[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy: Configure pen reset and eject lines

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/22926


Change subject: mb/google/poppy: Configure pen reset and eject lines
......................................................................

mb/google/poppy: Configure pen reset and eject lines

This change configures the GPIOs for pen reset and eject lines and
exports required properties using ACPI table.

BUG=b:70773138

Change-Id: I52f6c3dced54259cde8ee6753275622622e15954
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/baseboard/gpio.c
2 files changed, 11 insertions(+), 6 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/22926/1

diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 22ef9aa..ceb0c95 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -308,6 +308,11 @@
 				register "generic.hid" = ""WCOM50C1""
 				register "generic.desc" = ""WCOM Digitizer""
 				register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D1_IRQ)"
+				register "generic.wake" = "GPE0_DW1_12"
+				register "generic.has_power_resource" = "1"
+				register "generic.disable_gpio_export_in_crs" = "1"
+				register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D3)"
+				register "generic.reset_delay_ms" = "1"
 				register "hid_desc_reg_offset" = "0x1"
 				device i2c 0x9 on end
 			end
diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c
index a0dbbee..d0e2097 100644
--- a/src/mainboard/google/poppy/variants/baseboard/gpio.c
+++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c
@@ -166,8 +166,8 @@
 	PAD_CFG_GPI_APIC(GPP_D1, NONE, PLTRST),
 	/* D2  : SPI1_MISO ==> PEN_PDCT_L */
 	PAD_CFG_GPI_GPIO_DRIVER(GPP_D2, NONE, DEEP),
-	/* D3  : SPI1_MOSI ==> NC */
-	PAD_CFG_NC(GPP_D3),
+	/* D3  : SPI1_MOSI ==> PEN_RST_L */
+	PAD_CFG_GPO(GPP_D3, 0, DEEP),
 	/* D4  : FASHTRIG ==> NC */
 	PAD_CFG_NC(GPP_D4),
 	/* D5  : ISH_I2C0_SDA ==> ISH_I2C_SENSOR_1V8_SDA */
@@ -176,16 +176,16 @@
 	PAD_CFG_NF_1V8(GPP_D6, NONE, DEEP, NF1),
 	/* D7  : ISH_I2C1_SDA ==> NC */
 	PAD_CFG_NC(GPP_D7),
-	/* D8  : ISH_I2C1_SCL ==> NC */
-	PAD_CFG_NC(GPP_D8),
+	/* D8  : ISH_I2C1_SCL ==> PEN_EJECT_ODL -- for notification */
+	PAD_CFG_GPI(GPP_D8, NONE, PLTRST),
 	/* D9  : ISH_SPI_CS# ==> HP_IRQ_GPIO */
 	PAD_CFG_GPI_GPIO_DRIVER(GPP_D9, NONE, PLTRST),
 	/* D10 : ISH_SPI_CLK ==> SPKR_RST_L */
 	PAD_CFG_GPO(GPP_D10, 1, DEEP),
 	/* D11 : ISH_SPI_MISO ==> SPKR_INT_L */
 	PAD_CFG_GPI_APIC(GPP_D11, NONE, PLTRST),
-	/* D12 : ISH_SPI_MOSI ==> NC */
-	PAD_CFG_NC(GPP_D12),
+	/* D12 : ISH_SPI_MOSI ==> PEN_EJECT_ODL -- for wake event */
+	PAD_CFG_GPI_ACPI_SCI(GPP_D12, NONE, DEEP, INVERT),
 	/* D13 : ISH_UART0_RXD ==> NC */
 	PAD_CFG_NC(GPP_D13),
 	/* D14 : ISH_UART0_TXD ==> NC */

-- 
To view, visit https://review.coreboot.org/22926
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I52f6c3dced54259cde8ee6753275622622e15954
Gerrit-Change-Number: 22926
Gerrit-PatchSet: 1
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20171218/e2380705/attachment.html>