[coreboot-gerrit] Change in coreboot[master]: mainboard/ms7721: Fix HWM/Superio settings

Renze Nicolai (Code Review) gerrit at coreboot.org
Mon Dec 18 02:57:53 CET 2017


Renze Nicolai has uploaded this change for review. ( https://review.coreboot.org/22922


Change subject: mainboard/ms7721: Fix HWM/Superio settings
......................................................................

mainboard/ms7721: Fix HWM/Superio settings

This patch allows the temperature sensors to function.

Change-Id: I6491171eacc0c9848ba86ba7a62ec440226aae36
Signed-off-by: Renze Nicolai <renze at rnplus.nl>
---
M src/mainboard/msi/ms7721/devicetree.cb
M src/superio/fintek/f71869ad/chip.h
M src/superio/fintek/f71869ad/f71869ad_hwm.c
3 files changed, 19 insertions(+), 6 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/22922/1

diff --git a/src/mainboard/msi/ms7721/devicetree.cb b/src/mainboard/msi/ms7721/devicetree.cb
index d46eb84..9b76149 100644
--- a/src/mainboard/msi/ms7721/devicetree.cb
+++ b/src/mainboard/msi/ms7721/devicetree.cb
@@ -68,14 +68,16 @@
 						# HWM configuration registers
 						register "hwm_smbus_address" = "0x98"
 						register "hwm_smbus_control_reg" = "0x02"
-						register "hwm_fan_type_sel_reg" = "0x00"
+						register "hwm_fan_type_sel_reg" = "0x10"
 						register "hwm_fan1_temp_adj_rate_reg" = "0x33"
-						register "hwm_fan_mode_sel_reg" = "0x07"
+						register "hwm_fan_mode_sel_reg" = "0x15"
 						register "hwm_fan1_idx_rpm_mode" = "0x0e"
 						register "hwm_fan1_seg1_speed_count" = "0xff"
 						register "hwm_fan1_seg2_speed_count" = "0x0e"
 						register "hwm_fan1_seg3_speed_count" = "0x07"
 						register "hwm_fan1_temp_map_sel" = "0x8c"
+						register "hwm_temp_sensor_type" = "0x08"
+						
 						device pnp 4e.00 off end
 						device pnp 4e.01 on	# COM1
 							io 0x60 = 0x3f8
@@ -92,7 +94,7 @@
 							irq 0xf0 = 0x44 # PRT Mode Select Register
 						end
 						device pnp 4e.04 on	# Hardware Monitor
-							io 0x60 = 0x600
+							io 0x60 = 0x225
 							irq 0x70 = 0
 						end
 						device pnp 4e.05 on     # KBC
@@ -141,9 +143,16 @@
                                                         #irq 0x83 = 0x00	# GPIO7 drive enable
                                                 end
 
-						device pnp 4e.07 on end	# WDT
-						device pnp 4e.08 off end	# CIR
-						device pnp 4e.0a on end	# PME
+						device pnp 4e.07 on end	      # WDT
+						device pnp 4e.08 off end      # CIR
+						device pnp 4e.0a on         # PME
+						  irq 0xe0 = 0x80
+						  irq 0xe1 = 0xc0
+						  irq 0xe2 = 0x0c
+						  irq 0xe8 = 0x00 #Wakeup Enable [RI2, -, RI1, RING, GP, TIMEOUT, MOUSE, KB]
+						  irq 0xf8 = 0x1c #Led VCC Mode Select
+						  irq 0xf9 = 0x15 #Led VSB Mode Select
+						end
 					end # f71869ad
 				end	#device pci 14.3 # LPC
 				device pci 14.4 on  end # PCI 0x4384 (PCI slot on board)
diff --git a/src/superio/fintek/f71869ad/chip.h b/src/superio/fintek/f71869ad/chip.h
index 4e4323e..7424e9a 100644
--- a/src/superio/fintek/f71869ad/chip.h
+++ b/src/superio/fintek/f71869ad/chip.h
@@ -37,6 +37,7 @@
 	uint8_t hwm_fan1_seg2_speed_count;
 	uint8_t hwm_fan1_seg3_speed_count;
 	uint8_t hwm_fan1_temp_map_sel;
+    uint8_t hwm_temp_sensor_type;
 };
 
 #endif /* SUPERIO_FINTEK_F71869AD_CHIP_H */
diff --git a/src/superio/fintek/f71869ad/f71869ad_hwm.c b/src/superio/fintek/f71869ad/f71869ad_hwm.c
index d253e5f..e7d6483 100644
--- a/src/superio/fintek/f71869ad/f71869ad_hwm.c
+++ b/src/superio/fintek/f71869ad/f71869ad_hwm.c
@@ -50,6 +50,7 @@
 #define HWM_FAN1_SEG2_SPEED_COUNT  0xAB
 #define HWM_FAN1_SEG3_SPEED_COUNT  0xAC
 #define HWM_FAN1_TEMP_MAP_SEL      0xAF
+#define HWM_TEMP_SENSOR_TYPE       0x6B
 
 /* note: multifunc registers need to be tweaked before here */
 void f71869ad_hwm_init(struct device *dev)
@@ -97,6 +98,8 @@
 	pnp_write_index(port, HWM_FAN1_SEG1_SPEED_COUNT, conf->hwm_fan1_seg1_speed_count);
 	pnp_write_index(port, HWM_FAN1_SEG2_SPEED_COUNT, conf->hwm_fan1_seg2_speed_count);
 	pnp_write_index(port, HWM_FAN1_SEG3_SPEED_COUNT, conf->hwm_fan1_seg3_speed_count);
+    /* Temperature sensor type */
+    pnp_write_index(port, HWM_TEMP_SENSOR_TYPE, conf->hwm_temp_sensor_type);
 
 	pnp_exit_conf_mode(dev);
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6491171eacc0c9848ba86ba7a62ec440226aae36
Gerrit-Change-Number: 22922
Gerrit-PatchSet: 1
Gerrit-Owner: Renze Nicolai <renze at rnplus.nl>
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