[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Enable power button SMI when jumping to payload
Subrata Banik (Code Review)
gerrit at coreboot.org
Thu Dec 14 15:58:47 CET 2017
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/22868
Change subject: soc/intel/skylake: Enable power button SMI when jumping to payload
......................................................................
soc/intel/skylake: Enable power button SMI when jumping to payload
Instead of enabling power button SMI unconditionally, add a boot state
handler to enable power button SMI just before jumping to
payload.
Change-Id: Ia4fe2694006baf24ed475c85aaffa6a0d2a6031d
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/skylake/pmc.c
M src/soc/intel/skylake/smi.c
2 files changed, 16 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/22868/1
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index ff84690..fe78bf7 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <bootstate.h>
#include <chip.h>
#include <console/console.h>
#include <device/device.h>
@@ -197,4 +198,19 @@
CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL);
}
+static void pm1_enable_pwrbtn_smi(void *unused)
+{
+ /*
+ * Enable power button SMI only before jumping to payload. This ensures
+ * that:
+ * 1. Power button SMI is enabled only after coreboot is done.
+ * 2. On resume path, power button SMI is not enabled and thus avoids
+ * any shutdowns because of power button presses due to power button
+ * press in resume path.
+ */
+ pmc_update_pm1_enable(PWRBTN_EN);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL);
+
#endif
diff --git a/src/soc/intel/skylake/smi.c b/src/soc/intel/skylake/smi.c
index f11a9d8..67c3bb8 100644
--- a/src/soc/intel/skylake/smi.c
+++ b/src/soc/intel/skylake/smi.c
@@ -90,18 +90,3 @@
"d" (APM_CNT)
);
}
-
-static void pm1_enable_pwrbtn_smi(void *unused)
-{
- /*
- * Enable power button SMI only before jumping to payload. This ensures
- * that:
- * 1. Power button SMI is enabled only after coreboot is done.
- * 2. On resume path, power button SMI is not enabled and thus avoids
- * any shutdowns because of power button presses due to power button
- * press in resume path.
- */
- pmc_update_pm1_enable(PWRBTN_EN);
-}
-
-BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL);
--
To view, visit https://review.coreboot.org/22868
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia4fe2694006baf24ed475c85aaffa6a0d2a6031d
Gerrit-Change-Number: 22868
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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