[coreboot-gerrit] Change in coreboot[master]: fix src/soc/amd/common/agesawrapper_call.h
Richard Spiegel (Code Review)
gerrit at coreboot.org
Wed Dec 13 21:26:34 CET 2017
Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/22850
Change subject: fix src/soc/amd/common/agesawrapper_call.h
......................................................................
fix src/soc/amd/common/agesawrapper_call.h
Solve issues related to agesawrapper_call.h that came up at review
75dd50e233 (review 19724). This includes a hard coded table size and
2 macros: AGESAWRAPPER_PRE_CONSOLE() and AGESAWRAPPER().
Remove AGESAWRAPPER_PRE_CONSOLE(), and replace AGESAWRAPPER() calls with
the actual content of the macro.
BUG=b:62240989
TEST=
Change-Id: Ic51917d3961a51d4e725ff45b04f45eefe149855
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h
M src/soc/amd/common/block/pi/amd_late_init.c
M src/soc/amd/stoneyridge/bootblock/bootblock.c
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/romstage.c
6 files changed, 47 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/22850/1
diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h
index 4854bee..1188f05 100644
--- a/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h
+++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h
@@ -37,7 +37,7 @@
"AGESA_WARNING", "AGESA_ERROR",
"AGESA_CRITICAL", "AGESA_FATAL"
};
- if (sret > 7)
+ if (sret >= ARRAY_SIZE(statusStrings))
return "unknown"; /* Non-AGESA error code */
return statusStrings[sret];
}
@@ -51,9 +51,5 @@
name, decodeAGESA_STATUS(ret));
return (u32)ret;
}
-
-#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func)
-
-#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func()
#endif /* __AGESAWRAPPER_CALL_H__ */
diff --git a/src/soc/amd/common/block/pi/amd_late_init.c b/src/soc/amd/common/block/pi/amd_late_init.c
index 65667b9..12c01b5 100644
--- a/src/soc/amd/common/block/pi/amd_late_init.c
+++ b/src/soc/amd/common/block/pi/amd_late_init.c
@@ -25,15 +25,23 @@
static void agesawrapper_post_device(void *unused)
{
+ AGESA_STATUS ret;
+
if (acpi_is_wakeup_s3())
return;
- AGESAWRAPPER(amdinitlate);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitlate() entry\n");
+ ret = agesawrapper_amdinitlate();
+ printk(BIOS_DEBUG, "agesawrapper_amdinitlate() returned %s\n",
+ decodeAGESA_STATUS(ret));
if (!acpi_s3_resume_allowed())
return;
- AGESAWRAPPER(amdS3Save);
+ printk(BIOS_DEBUG, "agesawrapper_amdS3Save() entry\n");
+ ret = agesawrapper_amdS3Save();
+ printk(BIOS_DEBUG, "agesawrapper_amdS3Save() returned %s\n",
+ decodeAGESA_STATUS(ret));
}
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,
diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c
index 030c990..7f44351 100644
--- a/src/soc/amd/stoneyridge/bootblock/bootblock.c
+++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c
@@ -106,6 +106,8 @@
void bootblock_soc_init(void)
{
+ AGESA_STATUS ret;
+
if (IS_ENABLED(CONFIG_STONEYRIDGE_UART))
assert(CONFIG_UART_FOR_CONSOLE >= 0
&& CONFIG_UART_FOR_CONSOLE <= 1);
@@ -117,8 +119,14 @@
load_smu_fw1();
post_code(0x37);
- AGESAWRAPPER(amdinitreset);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset() entry\n");
+ ret = agesawrapper_amdinitreset();
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset() returned %s\n",
+ decodeAGESA_STATUS(ret));
post_code(0x38);
- AGESAWRAPPER(amdinitearly); /* APs will not exit amdinitearly */
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly() entry\n");
+ ret = agesawrapper_amdinitearly();
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly() returned %s\n",
+ decodeAGESA_STATUS(ret));
}
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 8d6a8e4..77e68a1 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -81,12 +81,17 @@
static void earliest_ramstage(void *unused)
{
+ AGESA_STATUS ret;
+
post_code(0x46);
if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW))
psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2");
post_code(0x47);
- AGESAWRAPPER(amdinitenv);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv() entry\n");
+ ret = agesawrapper_amdinitenv();
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv() returned %s\n",
+ decodeAGESA_STATUS(ret));
}
BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, earliest_ramstage, NULL);
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 27b5388..fed52fc 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -423,13 +423,23 @@
void domain_enable_resources(device_t dev)
{
- if (acpi_is_wakeup_s3())
- AGESAWRAPPER(fchs3laterestore);
+ AGESA_STATUS ret;
+
+ if (acpi_is_wakeup_s3()) {
+ printk(BIOS_DEBUG, "agesawrapper_fchs3laterestore() entry\n");
+ ret = agesawrapper_fchs3laterestore();
+ printk(BIOS_DEBUG,
+ "agesawrapper_fchs3laterestore() returned %s\n",
+ decodeAGESA_STATUS(ret));
+ }
/* Must be called after PCI enumeration and resource allocation */
- if (!acpi_is_wakeup_s3())
- AGESAWRAPPER(amdinitmid);
-
+ if (!acpi_is_wakeup_s3()) {
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmid() entry\n");
+ ret = agesawrapper_amdinitmid();
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmid() returned %s\n",
+ decodeAGESA_STATUS(ret));
+ }
printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n");
}
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 7c738ad..66b3989 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -41,11 +41,15 @@
msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
int vmtrrs = mtrr_cap.lo & MTRR_CAP_VCNT;
int i;
+ AGESA_STATUS ret;
console_init();
post_code(0x40);
- AGESAWRAPPER(amdinitpost);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost() entry\n");
+ ret = agesawrapper_amdinitpost();
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost() returned %s\n",
+ decodeAGESA_STATUS(ret));
post_code(0x41);
/*
--
To view, visit https://review.coreboot.org/22850
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic51917d3961a51d4e725ff45b04f45eefe149855
Gerrit-Change-Number: 22850
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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