<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22850">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">fix src/soc/amd/common/agesawrapper_call.h<br><br>Solve issues related to agesawrapper_call.h that came up at review<br>75dd50e233 (review 19724). This includes a hard coded table size and<br>2 macros: AGESAWRAPPER_PRE_CONSOLE() and AGESAWRAPPER().<br><br>Remove AGESAWRAPPER_PRE_CONSOLE(), and replace AGESAWRAPPER() calls with<br>the actual content of the macro.<br><br>BUG=b:62240989<br>TEST=<br><br>Change-Id: Ic51917d3961a51d4e725ff45b04f45eefe149855<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h<br>M src/soc/amd/common/block/pi/amd_late_init.c<br>M src/soc/amd/stoneyridge/bootblock/bootblock.c<br>M src/soc/amd/stoneyridge/chip.c<br>M src/soc/amd/stoneyridge/northbridge.c<br>M src/soc/amd/stoneyridge/romstage.c<br>6 files changed, 47 insertions(+), 16 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/22850/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h<br>index 4854bee..1188f05 100644<br>--- a/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h<br>+++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h<br>@@ -37,7 +37,7 @@<br> "AGESA_WARNING", "AGESA_ERROR",<br> "AGESA_CRITICAL", "AGESA_FATAL"<br> };<br>- if (sret > 7)<br>+ if (sret >= ARRAY_SIZE(statusStrings))<br> return "unknown"; /* Non-AGESA error code */<br> return statusStrings[sret];<br> }<br>@@ -51,9 +51,5 @@<br> name, decodeAGESA_STATUS(ret));<br> return (u32)ret;<br> }<br>-<br>-#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func)<br>-<br>-#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func()<br> <br> #endif /* __AGESAWRAPPER_CALL_H__ */<br>diff --git a/src/soc/amd/common/block/pi/amd_late_init.c b/src/soc/amd/common/block/pi/amd_late_init.c<br>index 65667b9..12c01b5 100644<br>--- a/src/soc/amd/common/block/pi/amd_late_init.c<br>+++ b/src/soc/amd/common/block/pi/amd_late_init.c<br>@@ -25,15 +25,23 @@<br> <br> static void agesawrapper_post_device(void *unused)<br> {<br>+ AGESA_STATUS ret;<br>+<br> if (acpi_is_wakeup_s3())<br> return;<br> <br>- AGESAWRAPPER(amdinitlate);<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitlate() entry\n");<br>+ ret = agesawrapper_amdinitlate();<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitlate() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br> <br> if (!acpi_s3_resume_allowed())<br> return;<br> <br>- AGESAWRAPPER(amdS3Save);<br>+ printk(BIOS_DEBUG, "agesawrapper_amdS3Save() entry\n");<br>+ ret = agesawrapper_amdS3Save();<br>+ printk(BIOS_DEBUG, "agesawrapper_amdS3Save() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br> }<br> <br> BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,<br>diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c<br>index 030c990..7f44351 100644<br>--- a/src/soc/amd/stoneyridge/bootblock/bootblock.c<br>+++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c<br>@@ -106,6 +106,8 @@<br> <br> void bootblock_soc_init(void)<br> {<br>+ AGESA_STATUS ret;<br>+<br> if (IS_ENABLED(CONFIG_STONEYRIDGE_UART))<br> assert(CONFIG_UART_FOR_CONSOLE >= 0<br> && CONFIG_UART_FOR_CONSOLE <= 1);<br>@@ -117,8 +119,14 @@<br> load_smu_fw1();<br> <br> post_code(0x37);<br>- AGESAWRAPPER(amdinitreset);<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset() entry\n");<br>+ ret = agesawrapper_amdinitreset();<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br> <br> post_code(0x38);<br>- AGESAWRAPPER(amdinitearly); /* APs will not exit amdinitearly */<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly() entry\n");<br>+ ret = agesawrapper_amdinitearly();<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br> }<br>diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c<br>index 8d6a8e4..77e68a1 100644<br>--- a/src/soc/amd/stoneyridge/chip.c<br>+++ b/src/soc/amd/stoneyridge/chip.c<br>@@ -81,12 +81,17 @@<br> <br> static void earliest_ramstage(void *unused)<br> {<br>+ AGESA_STATUS ret;<br>+<br> post_code(0x46);<br> if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW))<br> psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2");<br> <br> post_code(0x47);<br>- AGESAWRAPPER(amdinitenv);<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv() entry\n");<br>+ ret = agesawrapper_amdinitenv();<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br> }<br> <br> BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, earliest_ramstage, NULL);<br>diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c<br>index 27b5388..fed52fc 100644<br>--- a/src/soc/amd/stoneyridge/northbridge.c<br>+++ b/src/soc/amd/stoneyridge/northbridge.c<br>@@ -423,13 +423,23 @@<br> <br> void domain_enable_resources(device_t dev)<br> {<br>- if (acpi_is_wakeup_s3())<br>- AGESAWRAPPER(fchs3laterestore);<br>+ AGESA_STATUS ret;<br>+<br>+ if (acpi_is_wakeup_s3()) {<br>+ printk(BIOS_DEBUG, "agesawrapper_fchs3laterestore() entry\n");<br>+ ret = agesawrapper_fchs3laterestore();<br>+ printk(BIOS_DEBUG,<br>+ "agesawrapper_fchs3laterestore() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br>+ }<br> <br> /* Must be called after PCI enumeration and resource allocation */<br>- if (!acpi_is_wakeup_s3())<br>- AGESAWRAPPER(amdinitmid);<br>-<br>+ if (!acpi_is_wakeup_s3()) {<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitmid() entry\n");<br>+ ret = agesawrapper_amdinitmid();<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitmid() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br>+ }<br> printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n");<br> }<br> <br>diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c<br>index 7c738ad..66b3989 100644<br>--- a/src/soc/amd/stoneyridge/romstage.c<br>+++ b/src/soc/amd/stoneyridge/romstage.c<br>@@ -41,11 +41,15 @@<br> msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);<br> int vmtrrs = mtrr_cap.lo & MTRR_CAP_VCNT;<br> int i;<br>+ AGESA_STATUS ret;<br> <br> console_init();<br> <br> post_code(0x40);<br>- AGESAWRAPPER(amdinitpost);<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost() entry\n");<br>+ ret = agesawrapper_amdinitpost();<br>+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost() returned %s\n",<br>+ decodeAGESA_STATUS(ret));<br> <br> post_code(0x41);<br> /*<br></pre><p>To view, visit <a href="https://review.coreboot.org/22850">change 22850</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22850"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic51917d3961a51d4e725ff45b04f45eefe149855 </div>
<div style="display:none"> Gerrit-Change-Number: 22850 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>