[coreboot-gerrit] Change in coreboot[master]: soc/amd/common: Add S3 region to Kconfig

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22717


Change subject: soc/amd/common: Add S3 region to Kconfig
......................................................................

soc/amd/common: Add S3 region to Kconfig

Add default values for the S3 position and size symbols to Kconfig.
These are already defined by AMD platforms and this patch gives them
non-zero values when soc/amd/common is used.

The primary choice for the S3 save location will be determined by the
FMAP.  These values will form the "backup" region for storing S3 data
when no FMAP file is specified.  The values are typical for all AMD
platforms and should allow adequate room for rotation (the Stoney
Ridge NV size is 0x4c1 currently).

Change-Id: I0cc8c6a9dbf0e76d41e94d535c6afd9b93f2eb32
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/common/Kconfig
1 file changed, 20 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/22717/1

diff --git a/src/soc/amd/common/Kconfig b/src/soc/amd/common/Kconfig
index debedac..33713f9 100644
--- a/src/soc/amd/common/Kconfig
+++ b/src/soc/amd/common/Kconfig
@@ -11,4 +11,24 @@
 
 source "src/soc/amd/common/block/Kconfig"
 
+config S3_DATA_POS
+	hex
+	depends on HAVE_ACPI_RESUME
+	default 0xffff0000
+	help
+	  For designs not using a flash map, this is the physical address where
+	  S3 resume data is stored in the SPI flash.  Place this on a 4KB
+	  boundary for best results. The designer must ensure the region does
+	  not interfere with anything else in the image.
+
+config S3_DATA_SIZE
+	int
+	depends on HAVE_ACPI_RESUME
+	default 32768
+	help
+	  For designs not using a flash map, this is the total size of the
+	  region to be used for S3 resume data in the SPI flash.  Make this
+	  a multiple of 4KB for best results.  The designer must ensure the
+	  region does not interfere with anything else in the image.
+
 endif # SOC_AMD_COMMON

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I0cc8c6a9dbf0e76d41e94d535c6afd9b93f2eb32
Gerrit-Change-Number: 22717
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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