[coreboot-gerrit] Change in coreboot[master]: Revert "soc/intel/skylake: Clean up SoC ASL code."

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/22684


Change subject: Revert "soc/intel/skylake: Clean up SoC ASL code."
......................................................................

Revert "soc/intel/skylake: Clean up SoC ASL code."

This reverts commit a7b97510aeb1652fd0006c9b2d10df6568f37e2e.

For the internal eMMC to be used by Windows for installation,
the CARD device and _RMV methods are required.  Without them,
Windows does not see/show the eMMC as a valid installation
target.

TEST: boot google/chell with Tianocore payload and install
Windows 10 to the internal eMMC drive.

Change-Id: I04819ff16ab4cb0d2ea6e1c7f47179f5dacb7cfd
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/soc/intel/skylake/acpi/scs.asl
M src/soc/intel/skylake/acpi/systemagent.asl
2 files changed, 23 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/22684/1

diff --git a/src/soc/intel/skylake/acpi/scs.asl b/src/soc/intel/skylake/acpi/scs.asl
index 235a57e..e766fd7 100644
--- a/src/soc/intel/skylake/acpi/scs.asl
+++ b/src/soc/intel/skylake/acpi/scs.asl
@@ -101,6 +101,15 @@
 		Or (PMCR, 0x0003, PMCR)
 		Store (PMCR, ^TEMP)
 	}
+
+	Device (CARD)
+	{
+		Name (_ADR, 0x00000008)
+		Method (_RMV, 0, NotSerialized)
+		{
+			Return (0)
+		}
+	}
 }
 
 #if !IS_ENABLED(CONFIG_EXCLUDE_NATIVE_SD_INTERFACE)
@@ -162,5 +171,14 @@
 		^^PCRO (PID_GPIOCOM3, 0x4e4, 0x00001000)
 		^^PCRO (PID_GPIOCOM3, 0x4f4, 0x00001000)
 	}
+
+	Device (CARD)
+	{
+		Name (_ADR, 0x00000008)
+		Method (_RMV, 0, NotSerialized)
+		{
+			Return (1)
+		}
+	}
 }
 #endif
diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl
index a04fe9e..842bb70 100644
--- a/src/soc/intel/skylake/acpi/systemagent.asl
+++ b/src/soc/intel/skylake/acpi/systemagent.asl
@@ -340,6 +340,11 @@
 
 		/* HPET address decode range */
 		Memory32Fixed (ReadWrite, HPET_BASE_ADDRESS, 0x400)
+
+		/* Debug Base Address
+		 * Base Address for ACPI debug output memory buffer
+		 */
+		Memory32Fixed (ReadWrite, 0, 0, DBAD)
 	})
 
 	Method (_CRS, 0, Serialized)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I04819ff16ab4cb0d2ea6e1c7f47179f5dacb7cfd
Gerrit-Change-Number: 22684
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
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