[coreboot-gerrit] Change in coreboot[master]: sb/intel/*/nvs: Rename register

Patrick Rudolph (Code Review) gerrit at coreboot.org
Wed Aug 23 17:45:02 CEST 2017


Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/21158


Change subject: sb/intel/*/nvs: Rename register
......................................................................

sb/intel/*/nvs: Rename register

Rename register to match recent intel models.
Required for Lenovo H8 to operate on all generations.

Change-Id: I48a869adb1da2e33156968c4b7597edf99902c1a
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/southbridge/intel/i82801gx/acpi/globalnvs.asl
M src/southbridge/intel/i82801gx/nvs.h
M src/southbridge/intel/i82801ix/acpi/globalnvs.asl
M src/southbridge/intel/i82801ix/nvs.h
4 files changed, 8 insertions(+), 8 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/21158/1

diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
index fdd120e..9df2252 100644
--- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
@@ -50,11 +50,11 @@
 	/* Thermal policy */
 	Offset (0x14),
 	ACTT,	 8,	// 0x14 - active trip point
-	PSVT,	 8,	// 0x15 - passive trip point
+	TPSV,	 8,	// 0x15 - passive trip point
 	TC1V,	 8,	// 0x16 - passive trip point TC1
 	TC2V,	 8,	// 0x17 - passive trip point TC2
 	TSPV,	 8,	// 0x18 - passive trip point TSP
-	CRTT,	 8,	// 0x19 - critical trip point
+	TCRT,	 8,	// 0x19 - critical trip point
 	DTSE,	 8,	// 0x1a - Digital Thermal Sensor enable
 	DTS1,	 8,	// 0x1b - DT sensor 1
 	DTS2,	 8,	// 0x1c - DT sensor 2
diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h
index c3a3920..decea53 100644
--- a/src/southbridge/intel/i82801gx/nvs.h
+++ b/src/southbridge/intel/i82801gx/nvs.h
@@ -35,11 +35,11 @@
 	u8	dckn; /* 0x13 - PCIe docking state */
 	/* Thermal policy */
 	u8	actt; /* 0x14 - active trip point */
-	u8	psvt; /* 0x15 - passive trip point */
+	u8	tpsv; /* 0x15 - passive trip point */
 	u8	tc1v; /* 0x16 - passive trip point TC1 */
 	u8	tc2v; /* 0x17 - passive trip point TC2 */
 	u8	tspv; /* 0x18 - passive trip point TSP */
-	u8	crtt; /* 0x19 - critical trip point */
+	u8	tcrt; /* 0x19 - critical trip point */
 	u8	dtse; /* 0x1a - Digital Thermal Sensor enable */
 	u8	dts1; /* 0x1b - DT sensor 1 */
 	u8	dts2; /* 0x1c - DT sensor 2 */
diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
index df83064..97d9fa9 100644
--- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
@@ -51,11 +51,11 @@
 	/* Thermal policy */
 	Offset (0x14),
 	ACTT,	 8,	// 0x14 - active trip point
-	PSVT,	 8,	// 0x15 - passive trip point
+	TPSV,	 8,	// 0x15 - passive trip point
 	TC1V,	 8,	// 0x16 - passive trip point TC1
 	TC2V,	 8,	// 0x17 - passive trip point TC2
 	TSPV,	 8,	// 0x18 - passive trip point TSP
-	CRTT,	 8,	// 0x19 - critical trip point
+	TCRT,	 8,	// 0x19 - critical trip point
 	DTSE,	 8,	// 0x1a - Digital Thermal Sensor enable
 	DTS1,	 8,	// 0x1b - DT sensor 1
 	DTS2,	 8,	// 0x1c - DT sensor 2
diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h
index c3a3920..decea53 100644
--- a/src/southbridge/intel/i82801ix/nvs.h
+++ b/src/southbridge/intel/i82801ix/nvs.h
@@ -35,11 +35,11 @@
 	u8	dckn; /* 0x13 - PCIe docking state */
 	/* Thermal policy */
 	u8	actt; /* 0x14 - active trip point */
-	u8	psvt; /* 0x15 - passive trip point */
+	u8	tpsv; /* 0x15 - passive trip point */
 	u8	tc1v; /* 0x16 - passive trip point TC1 */
 	u8	tc2v; /* 0x17 - passive trip point TC2 */
 	u8	tspv; /* 0x18 - passive trip point TSP */
-	u8	crtt; /* 0x19 - critical trip point */
+	u8	tcrt; /* 0x19 - critical trip point */
 	u8	dtse; /* 0x1a - Digital Thermal Sensor enable */
 	u8	dts1; /* 0x1b - DT sensor 1 */
 	u8	dts2; /* 0x1c - DT sensor 2 */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I48a869adb1da2e33156968c4b7597edf99902c1a
Gerrit-Change-Number: 21158
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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