[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Fix Coverity scan error

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21155


Change subject: soc/intel/cannonlake: Fix Coverity scan error
......................................................................

soc/intel/cannonlake: Fix Coverity scan error

Add dummy PMC pci driver to avoid coverity scan error.

Bug:CID 1379849

Change-Id: Ica19735307736c8a55c29af88db8b1372f8779e4
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/Makefile.inc
A src/soc/intel/cannonlake/pmc.c
2 files changed, 39 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/21155/1

diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 10d444b..e1a37f3 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -27,6 +27,7 @@
 ramstage-y += chip.c
 ramstage-y += gspi.c
 ramstage-y += memmap.c
+ramstage-y += pmc.c
 ramstage-y += pmutil.c
 ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
 ramstage-y += spi.c
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
new file mode 100644
index 0000000..9043805
--- /dev/null
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <soc/ramstage.h>
+
+static struct device_operations device_ops = {
+	.read_resources		= &pci_dev_read_resources,
+	.set_resources		= &pci_dev_set_resources,
+	.enable_resources	= &pci_dev_enable_resources,
+};
+
+static const unsigned short pci_device_ids[] = {
+	PCI_DEVICE_ID_INTEL_CNL_PMC,
+	0
+};
+
+static const struct pci_driver pch_lpc __pci_driver = {
+	.ops	 = &device_ops,
+	.vendor	 = PCI_VENDOR_ID_INTEL,
+	.devices = pci_device_ids,
+};

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ica19735307736c8a55c29af88db8b1372f8779e4
Gerrit-Change-Number: 21155
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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