[coreboot-gerrit] Change in coreboot[master]: nb/amd/amdk8: Link early_setup_car.c
Arthur Heymans (Code Review)
gerrit at coreboot.org
Sat Aug 19 20:45:47 CEST 2017
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21109
Change subject: nb/amd/amdk8: Link early_setup_car.c
......................................................................
nb/amd/amdk8: Link early_setup_car.c
Change-Id: Ifd2740ccf0b63fd73e3fcb08ed7377963b93a9bd
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/mainboard/amd/dbm690t/romstage.c
M src/mainboard/amd/mahogany/romstage.c
M src/mainboard/amd/pistachio/romstage.c
M src/mainboard/amd/serengeti_cheetah/romstage.c
M src/mainboard/asrock/939a785gmh/romstage.c
M src/mainboard/asus/a8n_e/romstage.c
M src/mainboard/asus/a8v-e_deluxe/romstage.c
M src/mainboard/asus/a8v-e_se/romstage.c
M src/mainboard/asus/k8v-x/romstage.c
M src/mainboard/asus/kfsn4-dre_k8/romstage.c
M src/mainboard/asus/m2n-e/romstage.c
M src/mainboard/asus/m2v-mx_se/romstage.c
M src/mainboard/asus/m2v/romstage.c
M src/mainboard/broadcom/blast/romstage.c
M src/mainboard/gigabyte/ga_2761gxdk/romstage.c
M src/mainboard/gigabyte/m57sli/romstage.c
M src/mainboard/hp/dl145_g3/romstage.c
M src/mainboard/iwill/dk8_htx/romstage.c
M src/mainboard/kontron/kt690/romstage.c
M src/mainboard/msi/ms7135/romstage.c
M src/mainboard/msi/ms7260/romstage.c
M src/mainboard/msi/ms9185/romstage.c
M src/mainboard/msi/ms9282/romstage.c
M src/mainboard/nvidia/l1_2pvv/romstage.c
M src/mainboard/siemens/sitemp_g1p1/romstage.c
M src/mainboard/sunw/ultra40/romstage.c
M src/mainboard/sunw/ultra40m2/romstage.c
M src/mainboard/supermicro/h8dme/romstage.c
M src/mainboard/supermicro/h8dmr/romstage.c
M src/mainboard/technexion/tim5690/romstage.c
M src/mainboard/technexion/tim8690/romstage.c
M src/mainboard/tyan/s2912/romstage.c
M src/mainboard/winent/mb6047/romstage.c
M src/northbridge/amd/amdk8/Makefile.inc
M src/northbridge/amd/amdk8/amdk8.h
M src/northbridge/amd/amdk8/setup_resource_map.c
M src/southbridge/nvidia/mcp55/early_setup_car.c
37 files changed, 34 insertions(+), 39 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/21109/1
diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c
index faf3ef5..c8c8c40 100644
--- a/src/mainboard/amd/dbm690t/romstage.c
+++ b/src/mainboard/amd/dbm690t/romstage.c
@@ -30,7 +30,6 @@
#include <spd.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/amd/rs690/early_setup.c"
#include "southbridge/amd/sb600/early_setup.c"
#include <northbridge/amd/amdk8/f.h>
diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c
index c194996..a723ee7 100644
--- a/src/mainboard/amd/mahogany/romstage.c
+++ b/src/mainboard/amd/mahogany/romstage.c
@@ -30,7 +30,6 @@
#include <superio/ite/it8718f/it8718f.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
#include <northbridge/amd/amdk8/f.h>
diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c
index 38b3003..052b71f 100644
--- a/src/mainboard/amd/pistachio/romstage.c
+++ b/src/mainboard/amd/pistachio/romstage.c
@@ -28,7 +28,6 @@
#include <spd.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/amd/rs690/early_setup.c"
#include "southbridge/amd/sb600/early_setup.c"
#include <northbridge/amd/amdk8/f.h>
diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index aaec8c7..be53cbb 100644
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -30,7 +30,6 @@
#include <cpu/amd/mtrr.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <northbridge/amd/amdk8/f.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index 6343f10..21324e7 100644
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -31,7 +31,6 @@
#include <superio/winbond/w83627dhg/w83627dhg.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
#include <northbridge/amd/amdk8/pre_f.h>
diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c
index ec66a5a..20c57c1 100644
--- a/src/mainboard/asus/a8n_e/romstage.c
+++ b/src/mainboard/asus/a8n_e/romstage.c
@@ -40,7 +40,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "cpu/amd/dualcore/dualcore.c"
#include <spd.h>
#include <northbridge/amd/amdk8/pre_f.h>
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index 87fec55..88a05f4 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -39,7 +39,7 @@
#include <southbridge/via/vt8237r/vt8237r.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
+
#include <spd.h>
#include <northbridge/amd/amdk8/pre_f.h>
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index adcf381..3628d07 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -39,7 +39,6 @@
#include <southbridge/via/vt8237r/vt8237r.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <spd.h>
#include <northbridge/amd/amdk8/pre_f.h>
diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c
index 15c8f2e..83bf27b 100644
--- a/src/mainboard/asus/k8v-x/romstage.c
+++ b/src/mainboard/asus/k8v-x/romstage.c
@@ -39,7 +39,6 @@
#include <southbridge/via/vt8237r/vt8237r.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <spd.h>
#include <northbridge/amd/amdk8/pre_f.h>
diff --git a/src/mainboard/asus/kfsn4-dre_k8/romstage.c b/src/mainboard/asus/kfsn4-dre_k8/romstage.c
index 687dd6b..f646c2b 100644
--- a/src/mainboard/asus/kfsn4-dre_k8/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre_k8/romstage.c
@@ -40,7 +40,6 @@
#include <cpu/amd/mtrr.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627thg/w83627thg.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <northbridge/amd/amdk8/f.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c
index cf1a0cd..2ca0fbc 100644
--- a/src/mainboard/asus/m2n-e/romstage.c
+++ b/src/mainboard/asus/m2n-e/romstage.c
@@ -37,7 +37,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
#define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO)
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 3267369..f54d599 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -39,7 +39,6 @@
#include <southbridge/via/vt8237r/vt8237r.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <spd.h>
#include <northbridge/amd/amdk8/f.h>
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index 0e822e8..563206e 100644
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -39,7 +39,6 @@
#include <southbridge/via/vt8237r/vt8237r.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c
index 10efb7b..d4cf882 100644
--- a/src/mainboard/broadcom/blast/romstage.c
+++ b/src/mainboard/broadcom/blast/romstage.c
@@ -16,7 +16,6 @@
#include <superio/nsc/pc87417/pc87417.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <northbridge/amd/amdk8/pre_f.h>
#define SERIAL_DEV PNP_DEV(0x2e, PC87417_SP1)
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index d787580..d56de52 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -38,7 +38,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/sis/sis966/early_ctrl.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index 4944bf6..12939ca 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -34,7 +34,6 @@
#include <superio/ite/it8716f/it8716f.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
#define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO)
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 9a8ef89..ce9d5ac 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -40,7 +40,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, PILOT_SP1)
#define RTC_DEV PNP_DEV(0x4e, PC87417_RTC)
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 683d773..34a8924 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -15,7 +15,6 @@
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <northbridge/amd/amdk8/pre_f.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c
index d2f6299..ae5970e 100644
--- a/src/mainboard/kontron/kt690/romstage.c
+++ b/src/mainboard/kontron/kt690/romstage.c
@@ -33,7 +33,6 @@
#include <cpu/amd/mtrr.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/amd/rs690/early_setup.c"
#include "southbridge/amd/sb600/early_setup.c"
#include <northbridge/amd/amdk8/f.h>
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 57b0acb..7d8007c 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -37,7 +37,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "cpu/amd/dualcore/dualcore.c"
#include <spd.h>
#include <northbridge/amd/amdk8/pre_f.h>
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index 878a79e..0569365 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -37,7 +37,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1)
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index 3d937f7..33dc288 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -38,7 +38,6 @@
#include <superio/nsc/pc87417/pc87417.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, PC87417_SP1)
#define RTC_DEV PNP_DEV(0x2e, PC87417_RTC)
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index 3bfb9da..2334c11 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -37,7 +37,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
#include <spd.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <device/pci_ids.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index d8076f0..3aa261b 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -36,7 +36,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c
index 90f8084..dec5c68 100644
--- a/src/mainboard/siemens/sitemp_g1p1/romstage.c
+++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c
@@ -36,7 +36,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/amd/rs690/early_setup.c"
#include "southbridge/amd/sb600/early_setup.c"
diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c
index c11ffe7..8a9d81e 100644
--- a/src/mainboard/sunw/ultra40/romstage.c
+++ b/src/mainboard/sunw/ultra40/romstage.c
@@ -19,7 +19,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
#include "superio/smsc/lpc47b397/early_gpio.c"
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <northbridge/amd/amdk8/pre_f.h>
#define SERIAL_DEV PNP_DEV(0x2e, LPC47B397_SP1)
diff --git a/src/mainboard/sunw/ultra40m2/romstage.c b/src/mainboard/sunw/ultra40m2/romstage.c
index 48c7963..1dd09f6 100644
--- a/src/mainboard/sunw/ultra40m2/romstage.c
+++ b/src/mainboard/sunw/ultra40m2/romstage.c
@@ -35,7 +35,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, DME1737_SP1)
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index 17df141..0255242 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -33,7 +33,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#define DUMMY_DEV PNP_DEV(0x2e, 0)
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index c71eaa1..a57be62 100644
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -36,7 +36,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#define DUMMY_DEV PNP_DEV(0x2e, 0)
diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c
index 64b1e27..520247e 100644
--- a/src/mainboard/technexion/tim5690/romstage.c
+++ b/src/mainboard/technexion/tim5690/romstage.c
@@ -31,7 +31,6 @@
#include <superio/ite/it8712f/it8712f.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/amd/rs690/early_setup.c"
#include "southbridge/amd/sb600/early_setup.c"
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index 05e00e0..1bb4a7f 100644
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -31,7 +31,6 @@
#include <superio/ite/it8712f/it8712f.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/amd/rs690/early_setup.c"
#include "southbridge/amd/sb600/early_setup.c"
#include <northbridge/amd/amdk8/f.h>
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 882d90d..c4804c5 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -36,7 +36,6 @@
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
diff --git a/src/mainboard/winent/mb6047/romstage.c b/src/mainboard/winent/mb6047/romstage.c
index 3271f74..ac4c3b4 100644
--- a/src/mainboard/winent/mb6047/romstage.c
+++ b/src/mainboard/winent/mb6047/romstage.c
@@ -18,7 +18,6 @@
#include <superio/winbond/w83627thg/w83627thg.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <northbridge/amd/amdk8/pre_f.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
diff --git a/src/northbridge/amd/amdk8/Makefile.inc b/src/northbridge/amd/amdk8/Makefile.inc
index 263e06f..77bf375 100644
--- a/src/northbridge/amd/amdk8/Makefile.inc
+++ b/src/northbridge/amd/amdk8/Makefile.inc
@@ -13,6 +13,7 @@
romstage-y += reset_test.c
romstage-y += coherent_ht.c
+romstage-y += setup_resource_map.c
# Enable this if you want to check the values of the PCI routing registers.
# Call show_all_routes() anywhere amdk8.h is included.
diff --git a/src/northbridge/amd/amdk8/amdk8.h b/src/northbridge/amd/amdk8/amdk8.h
index 65b6fb6..b183976 100644
--- a/src/northbridge/amd/amdk8/amdk8.h
+++ b/src/northbridge/amd/amdk8/amdk8.h
@@ -19,6 +19,10 @@
#define NODE_MP(x) PCI_DEV(0,24+x,1)
#define NODE_MC(x) PCI_DEV(0,24+x,3)
+#define RES_PCI_IO 0x10
+#define RES_PORT_IO_8 0x22
+#define RES_PORT_IO_32 0x20
+#define RES_MEM_IO 0x40
#ifdef __PRE_RAM__
void showallroutes(int level, pci_devfn_t dev);
@@ -26,6 +30,10 @@
void fill_mem_ctrl(int controllers, struct mem_controller *ctrl_a, const uint16_t *spd_addr);
int optimize_link_coherent_ht(void);
unsigned int get_nodes(void);
+void setup_resource_map_x_offset(const unsigned int *register_values, int max,
+ unsigned int offset_pci_dev,
+ unsigned int offset_io_base);
+
#if IS_ENABLED(CONFIG_RAMINIT_SYSINFO)
void setup_coherent_ht_domain(void);
#else
diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c
index 38f8fdd..31408f1 100644
--- a/src/northbridge/amd/amdk8/setup_resource_map.c
+++ b/src/northbridge/amd/amdk8/setup_resource_map.c
@@ -1,3 +1,20 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+
#include "amdk8.h"
#define RES_DEBUG 0
@@ -28,12 +45,9 @@
#endif
}
-#define RES_PCI_IO 0x10
-#define RES_PORT_IO_8 0x22
-#define RES_PORT_IO_32 0x20
-#define RES_MEM_IO 0x40
-
-static void setup_resource_map_x_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base)
+void setup_resource_map_x_offset(const unsigned int *register_values, int max,
+ unsigned int offset_pci_dev,
+ unsigned int offset_io_base)
{
int i;
diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c
index 8019a8e..44a330c 100644
--- a/src/southbridge/nvidia/mcp55/early_setup_car.c
+++ b/src/southbridge/nvidia/mcp55/early_setup_car.c
@@ -15,6 +15,10 @@
* GNU General Public License for more details.
*/
+#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDK8)
+#include <northbridge/amd/amdk8/amdk8.h>
+#endif
+
#ifdef UNUSED_CODE
int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val);
--
To view, visit https://review.coreboot.org/21109
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ifd2740ccf0b63fd73e3fcb08ed7377963b93a9bd
Gerrit-Change-Number: 21109
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170819/ee348b7e/attachment-0001.html>
More information about the coreboot-gerrit
mailing list