<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21109">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/amd/amdk8: Link early_setup_car.c<br><br>Change-Id: Ifd2740ccf0b63fd73e3fcb08ed7377963b93a9bd<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/mainboard/amd/dbm690t/romstage.c<br>M src/mainboard/amd/mahogany/romstage.c<br>M src/mainboard/amd/pistachio/romstage.c<br>M src/mainboard/amd/serengeti_cheetah/romstage.c<br>M src/mainboard/asrock/939a785gmh/romstage.c<br>M src/mainboard/asus/a8n_e/romstage.c<br>M src/mainboard/asus/a8v-e_deluxe/romstage.c<br>M src/mainboard/asus/a8v-e_se/romstage.c<br>M src/mainboard/asus/k8v-x/romstage.c<br>M src/mainboard/asus/kfsn4-dre_k8/romstage.c<br>M src/mainboard/asus/m2n-e/romstage.c<br>M src/mainboard/asus/m2v-mx_se/romstage.c<br>M src/mainboard/asus/m2v/romstage.c<br>M src/mainboard/broadcom/blast/romstage.c<br>M src/mainboard/gigabyte/ga_2761gxdk/romstage.c<br>M src/mainboard/gigabyte/m57sli/romstage.c<br>M src/mainboard/hp/dl145_g3/romstage.c<br>M src/mainboard/iwill/dk8_htx/romstage.c<br>M src/mainboard/kontron/kt690/romstage.c<br>M src/mainboard/msi/ms7135/romstage.c<br>M src/mainboard/msi/ms7260/romstage.c<br>M src/mainboard/msi/ms9185/romstage.c<br>M src/mainboard/msi/ms9282/romstage.c<br>M src/mainboard/nvidia/l1_2pvv/romstage.c<br>M src/mainboard/siemens/sitemp_g1p1/romstage.c<br>M src/mainboard/sunw/ultra40/romstage.c<br>M src/mainboard/sunw/ultra40m2/romstage.c<br>M src/mainboard/supermicro/h8dme/romstage.c<br>M src/mainboard/supermicro/h8dmr/romstage.c<br>M src/mainboard/technexion/tim5690/romstage.c<br>M src/mainboard/technexion/tim8690/romstage.c<br>M src/mainboard/tyan/s2912/romstage.c<br>M src/mainboard/winent/mb6047/romstage.c<br>M src/northbridge/amd/amdk8/Makefile.inc<br>M src/northbridge/amd/amdk8/amdk8.h<br>M src/northbridge/amd/amdk8/setup_resource_map.c<br>M src/southbridge/nvidia/mcp55/early_setup_car.c<br>37 files changed, 34 insertions(+), 39 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/21109/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c<br>index faf3ef5..c8c8c40 100644<br>--- a/src/mainboard/amd/dbm690t/romstage.c<br>+++ b/src/mainboard/amd/dbm690t/romstage.c<br>@@ -30,7 +30,6 @@<br> #include <spd.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "southbridge/amd/rs690/early_setup.c"<br> #include "southbridge/amd/sb600/early_setup.c"<br> #include <northbridge/amd/amdk8/f.h><br>diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c<br>index c194996..a723ee7 100644<br>--- a/src/mainboard/amd/mahogany/romstage.c<br>+++ b/src/mainboard/amd/mahogany/romstage.c<br>@@ -30,7 +30,6 @@<br> #include <superio/ite/it8718f/it8718f.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <southbridge/amd/sb700/sb700.h><br> #include <southbridge/amd/sb700/smbus.h><br> #include <northbridge/amd/amdk8/f.h><br>diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c<br>index 38b3003..052b71f 100644<br>--- a/src/mainboard/amd/pistachio/romstage.c<br>+++ b/src/mainboard/amd/pistachio/romstage.c<br>@@ -28,7 +28,6 @@<br> #include <spd.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "southbridge/amd/rs690/early_setup.c"<br> #include "southbridge/amd/sb600/early_setup.c"<br> #include <northbridge/amd/amdk8/f.h><br>diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c<br>index aaec8c7..be53cbb 100644<br>--- a/src/mainboard/amd/serengeti_cheetah/romstage.c<br>+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c<br>@@ -30,7 +30,6 @@<br> #include <cpu/amd/mtrr.h><br> #include <superio/winbond/common/winbond.h><br> #include <superio/winbond/w83627hf/w83627hf.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <northbridge/amd/amdk8/f.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)<br>diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c<br>index 6343f10..21324e7 100644<br>--- a/src/mainboard/asrock/939a785gmh/romstage.c<br>+++ b/src/mainboard/asrock/939a785gmh/romstage.c<br>@@ -31,7 +31,6 @@<br> #include <superio/winbond/w83627dhg/w83627dhg.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <southbridge/amd/sb700/sb700.h><br> #include <southbridge/amd/sb700/smbus.h><br> #include <northbridge/amd/amdk8/pre_f.h><br>diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c<br>index ec66a5a..20c57c1 100644<br>--- a/src/mainboard/asus/a8n_e/romstage.c<br>+++ b/src/mainboard/asus/a8n_e/romstage.c<br>@@ -40,7 +40,6 @@<br> <br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "cpu/amd/dualcore/dualcore.c"<br> #include <spd.h><br> #include <northbridge/amd/amdk8/pre_f.h><br>diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c<br>index 87fec55..88a05f4 100644<br>--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c<br>+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c<br>@@ -39,7 +39,7 @@<br> #include <southbridge/via/vt8237r/vt8237r.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br>+<br> #include <spd.h><br> #include <northbridge/amd/amdk8/pre_f.h><br> <br>diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c<br>index adcf381..3628d07 100644<br>--- a/src/mainboard/asus/a8v-e_se/romstage.c<br>+++ b/src/mainboard/asus/a8v-e_se/romstage.c<br>@@ -39,7 +39,6 @@<br> #include <southbridge/via/vt8237r/vt8237r.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <spd.h><br> #include <northbridge/amd/amdk8/pre_f.h><br> <br>diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c<br>index 15c8f2e..83bf27b 100644<br>--- a/src/mainboard/asus/k8v-x/romstage.c<br>+++ b/src/mainboard/asus/k8v-x/romstage.c<br>@@ -39,7 +39,6 @@<br> #include <southbridge/via/vt8237r/vt8237r.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <spd.h><br> #include <northbridge/amd/amdk8/pre_f.h><br> <br>diff --git a/src/mainboard/asus/kfsn4-dre_k8/romstage.c b/src/mainboard/asus/kfsn4-dre_k8/romstage.c<br>index 687dd6b..f646c2b 100644<br>--- a/src/mainboard/asus/kfsn4-dre_k8/romstage.c<br>+++ b/src/mainboard/asus/kfsn4-dre_k8/romstage.c<br>@@ -40,7 +40,6 @@<br> #include <cpu/amd/mtrr.h><br> #include <superio/winbond/common/winbond.h><br> #include <superio/winbond/w83627thg/w83627thg.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <northbridge/amd/amdk8/f.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)<br>diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c<br>index cf1a0cd..2ca0fbc 100644<br>--- a/src/mainboard/asus/m2n-e/romstage.c<br>+++ b/src/mainboard/asus/m2n-e/romstage.c<br>@@ -37,7 +37,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)<br> #define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO)<br>diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c<br>index 3267369..f54d599 100644<br>--- a/src/mainboard/asus/m2v-mx_se/romstage.c<br>+++ b/src/mainboard/asus/m2v-mx_se/romstage.c<br>@@ -39,7 +39,6 @@<br> #include <southbridge/via/vt8237r/vt8237r.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <spd.h><br> #include <northbridge/amd/amdk8/f.h><br> <br>diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c<br>index 0e822e8..563206e 100644<br>--- a/src/mainboard/asus/m2v/romstage.c<br>+++ b/src/mainboard/asus/m2v/romstage.c<br>@@ -39,7 +39,6 @@<br> #include <southbridge/via/vt8237r/vt8237r.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <spd.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)<br>diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c<br>index 10efb7b..d4cf882 100644<br>--- a/src/mainboard/broadcom/blast/romstage.c<br>+++ b/src/mainboard/broadcom/blast/romstage.c<br>@@ -16,7 +16,6 @@<br> #include <superio/nsc/pc87417/pc87417.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <northbridge/amd/amdk8/pre_f.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, PC87417_SP1)<br>diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c<br>index d787580..d56de52 100644<br>--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c<br>+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c<br>@@ -38,7 +38,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "southbridge/sis/sis966/early_ctrl.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)<br>diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c<br>index 4944bf6..12939ca 100644<br>--- a/src/mainboard/gigabyte/m57sli/romstage.c<br>+++ b/src/mainboard/gigabyte/m57sli/romstage.c<br>@@ -34,7 +34,6 @@<br> #include <superio/ite/it8716f/it8716f.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)<br> #define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO)<br>diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c<br>index 9a8ef89..ce9d5ac 100644<br>--- a/src/mainboard/hp/dl145_g3/romstage.c<br>+++ b/src/mainboard/hp/dl145_g3/romstage.c<br>@@ -40,7 +40,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, PILOT_SP1)<br> #define RTC_DEV PNP_DEV(0x4e, PC87417_RTC)<br>diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c<br>index 683d773..34a8924 100644<br>--- a/src/mainboard/iwill/dk8_htx/romstage.c<br>+++ b/src/mainboard/iwill/dk8_htx/romstage.c<br>@@ -15,7 +15,6 @@<br> <br> #include <superio/winbond/common/winbond.h><br> #include <superio/winbond/w83627hf/w83627hf.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <northbridge/amd/amdk8/pre_f.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)<br>diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c<br>index d2f6299..ae5970e 100644<br>--- a/src/mainboard/kontron/kt690/romstage.c<br>+++ b/src/mainboard/kontron/kt690/romstage.c<br>@@ -33,7 +33,6 @@<br> #include <cpu/amd/mtrr.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "southbridge/amd/rs690/early_setup.c"<br> #include "southbridge/amd/sb600/early_setup.c"<br> #include <northbridge/amd/amdk8/f.h><br>diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c<br>index 57b0acb..7d8007c 100644<br>--- a/src/mainboard/msi/ms7135/romstage.c<br>+++ b/src/mainboard/msi/ms7135/romstage.c<br>@@ -37,7 +37,6 @@<br> <br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "cpu/amd/dualcore/dualcore.c"<br> #include <spd.h><br> #include <northbridge/amd/amdk8/pre_f.h><br>diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c<br>index 878a79e..0569365 100644<br>--- a/src/mainboard/msi/ms7260/romstage.c<br>+++ b/src/mainboard/msi/ms7260/romstage.c<br>@@ -37,7 +37,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1)<br> <br>diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c<br>index 3d937f7..33dc288 100644<br>--- a/src/mainboard/msi/ms9185/romstage.c<br>+++ b/src/mainboard/msi/ms9185/romstage.c<br>@@ -38,7 +38,6 @@<br> #include <superio/nsc/pc87417/pc87417.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, PC87417_SP1)<br> #define RTC_DEV PNP_DEV(0x2e, PC87417_RTC)<br>diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c<br>index 3bfb9da..2334c11 100644<br>--- a/src/mainboard/msi/ms9282/romstage.c<br>+++ b/src/mainboard/msi/ms9282/romstage.c<br>@@ -37,7 +37,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> #include <spd.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <device/pci_ids.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)<br>diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c<br>index d8076f0..3aa261b 100644<br>--- a/src/mainboard/nvidia/l1_2pvv/romstage.c<br>+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c<br>@@ -36,7 +36,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)<br> <br>diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c<br>index 90f8084..dec5c68 100644<br>--- a/src/mainboard/siemens/sitemp_g1p1/romstage.c<br>+++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c<br>@@ -36,7 +36,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #include "southbridge/amd/rs690/early_setup.c"<br> #include "southbridge/amd/sb600/early_setup.c"<br>diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c<br>index c11ffe7..8a9d81e 100644<br>--- a/src/mainboard/sunw/ultra40/romstage.c<br>+++ b/src/mainboard/sunw/ultra40/romstage.c<br>@@ -19,7 +19,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> #include "superio/smsc/lpc47b397/early_gpio.c"<br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <northbridge/amd/amdk8/pre_f.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, LPC47B397_SP1)<br>diff --git a/src/mainboard/sunw/ultra40m2/romstage.c b/src/mainboard/sunw/ultra40m2/romstage.c<br>index 48c7963..1dd09f6 100644<br>--- a/src/mainboard/sunw/ultra40m2/romstage.c<br>+++ b/src/mainboard/sunw/ultra40m2/romstage.c<br>@@ -35,7 +35,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, DME1737_SP1)<br> <br>diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c<br>index 17df141..0255242 100644<br>--- a/src/mainboard/supermicro/h8dme/romstage.c<br>+++ b/src/mainboard/supermicro/h8dme/romstage.c<br>@@ -33,7 +33,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)<br> #define DUMMY_DEV PNP_DEV(0x2e, 0)<br>diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c<br>index c71eaa1..a57be62 100644<br>--- a/src/mainboard/supermicro/h8dmr/romstage.c<br>+++ b/src/mainboard/supermicro/h8dmr/romstage.c<br>@@ -36,7 +36,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)<br> #define DUMMY_DEV PNP_DEV(0x2e, 0)<br>diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c<br>index 64b1e27..520247e 100644<br>--- a/src/mainboard/technexion/tim5690/romstage.c<br>+++ b/src/mainboard/technexion/tim5690/romstage.c<br>@@ -31,7 +31,6 @@<br> #include <superio/ite/it8712f/it8712f.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "southbridge/amd/rs690/early_setup.c"<br> #include "southbridge/amd/sb600/early_setup.c"<br> <br>diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c<br>index 05e00e0..1bb4a7f 100644<br>--- a/src/mainboard/technexion/tim8690/romstage.c<br>+++ b/src/mainboard/technexion/tim8690/romstage.c<br>@@ -31,7 +31,6 @@<br> #include <superio/ite/it8712f/it8712f.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include "southbridge/amd/rs690/early_setup.c"<br> #include "southbridge/amd/sb600/early_setup.c"<br> #include <northbridge/amd/amdk8/f.h><br>diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c<br>index 882d90d..c4804c5 100644<br>--- a/src/mainboard/tyan/s2912/romstage.c<br>+++ b/src/mainboard/tyan/s2912/romstage.c<br>@@ -36,7 +36,6 @@<br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br> <br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)<br> <br>diff --git a/src/mainboard/winent/mb6047/romstage.c b/src/mainboard/winent/mb6047/romstage.c<br>index 3271f74..ac4c3b4 100644<br>--- a/src/mainboard/winent/mb6047/romstage.c<br>+++ b/src/mainboard/winent/mb6047/romstage.c<br>@@ -18,7 +18,6 @@<br> #include <superio/winbond/w83627thg/w83627thg.h><br> #include <cpu/amd/car.h><br> #include <cpu/x86/bist.h><br>-#include "northbridge/amd/amdk8/setup_resource_map.c"<br> #include <northbridge/amd/amdk8/pre_f.h><br> <br> #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)<br>diff --git a/src/northbridge/amd/amdk8/Makefile.inc b/src/northbridge/amd/amdk8/Makefile.inc<br>index 263e06f..77bf375 100644<br>--- a/src/northbridge/amd/amdk8/Makefile.inc<br>+++ b/src/northbridge/amd/amdk8/Makefile.inc<br>@@ -13,6 +13,7 @@<br> <br> romstage-y += reset_test.c<br> romstage-y += coherent_ht.c<br>+romstage-y += setup_resource_map.c<br> <br> # Enable this if you want to check the values of the PCI routing registers.<br> # Call show_all_routes() anywhere amdk8.h is included.<br>diff --git a/src/northbridge/amd/amdk8/amdk8.h b/src/northbridge/amd/amdk8/amdk8.h<br>index 65b6fb6..b183976 100644<br>--- a/src/northbridge/amd/amdk8/amdk8.h<br>+++ b/src/northbridge/amd/amdk8/amdk8.h<br>@@ -19,6 +19,10 @@<br> #define NODE_MP(x) PCI_DEV(0,24+x,1)<br> #define NODE_MC(x) PCI_DEV(0,24+x,3)<br> <br>+#define RES_PCI_IO 0x10<br>+#define RES_PORT_IO_8 0x22<br>+#define RES_PORT_IO_32 0x20<br>+#define RES_MEM_IO 0x40<br> <br> #ifdef __PRE_RAM__<br> void showallroutes(int level, pci_devfn_t dev);<br>@@ -26,6 +30,10 @@<br> void fill_mem_ctrl(int controllers, struct mem_controller *ctrl_a, const uint16_t *spd_addr);<br> int optimize_link_coherent_ht(void);<br> unsigned int get_nodes(void);<br>+void setup_resource_map_x_offset(const unsigned int *register_values, int max,<br>+                             unsigned int offset_pci_dev,<br>+                         unsigned int offset_io_base);<br>+<br> #if IS_ENABLED(CONFIG_RAMINIT_SYSINFO)<br> void setup_coherent_ht_domain(void);<br> #else<br>diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c<br>index 38f8fdd..31408f1 100644<br>--- a/src/northbridge/amd/amdk8/setup_resource_map.c<br>+++ b/src/northbridge/amd/amdk8/setup_resource_map.c<br>@@ -1,3 +1,20 @@<br>+/*<br>+ * This file is part of the coreboot project.<br>+ *<br>+ * This program is free software; you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>+ * the Free Software Foundation; either version 2 of the License, or<br>+ * (at your option) any later version.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the<br>+ * GNU General Public License for more details.<br>+ */<br>+<br>+#include <arch/io.h><br>+#include <console/console.h><br>+<br> #include "amdk8.h"<br> <br> #define RES_DEBUG 0<br>@@ -28,12 +45,9 @@<br> #endif<br> }<br> <br>-#define RES_PCI_IO 0x10<br>-#define RES_PORT_IO_8 0x22<br>-#define RES_PORT_IO_32 0x20<br>-#define RES_MEM_IO 0x40<br>-<br>-static void setup_resource_map_x_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base)<br>+void setup_resource_map_x_offset(const unsigned int *register_values, int max,<br>+                          unsigned int offset_pci_dev,<br>+                         unsigned int offset_io_base)<br> {<br>      int i;<br> <br>diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c<br>index 8019a8e..44a330c 100644<br>--- a/src/southbridge/nvidia/mcp55/early_setup_car.c<br>+++ b/src/southbridge/nvidia/mcp55/early_setup_car.c<br>@@ -15,6 +15,10 @@<br>  * GNU General Public License for more details.<br>  */<br> <br>+#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDK8)<br>+#include <northbridge/amd/amdk8/amdk8.h><br>+#endif<br>+<br> #ifdef UNUSED_CODE<br> int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val);<br> <br></pre><p>To view, visit <a href="https://review.coreboot.org/21109">change 21109</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21109"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ifd2740ccf0b63fd73e3fcb08ed7377963b93a9bd </div>
<div style="display:none"> Gerrit-Change-Number: 21109 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>