[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Remove TCO lock down programming

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21031


Change subject: soc/intel/skylake: Remove TCO lock down programming
......................................................................

soc/intel/skylake: Remove TCO lock down programming

FSP is doing TCO lock inside Notofy 1 hence remove
TCO Lock down programming inside coreboot.

TEST= Ensure TCO_LOCK offset 8 bit 12 is set.

Change-Id: Iec9e3075df01862f8558b303a458126c68202bff
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/skylake/finalize.c
1 file changed, 0 insertions(+), 8 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/21031/1

diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index 53c1c58..aed7e87 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -86,8 +86,6 @@
 {
 	device_t dev;
 	uint32_t reg32;
-	u16 tcobase;
-	u16 tcocnt;
 	uint8_t *pmcbase;
 	config_t *config;
 	u8 reg8;
@@ -97,12 +95,6 @@
 
 	/* Lock FAST_SPIBAR */
 	fast_spi_lock_bar();
-
-	/*TCO Lock down */
-	tcobase = smbus_tco_regs();
-	tcocnt = inw(tcobase + TCO1_CNT);
-	tcocnt |= TCO_LOCK;
-	outw(tcocnt, tcobase + TCO1_CNT);
 
 	/* Display me status before we hide it */
 	intel_me_status();

-- 
To view, visit https://review.coreboot.org/21031
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iec9e3075df01862f8558b303a458126c68202bff
Gerrit-Change-Number: 21031
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170816/711377e5/attachment.html>