[coreboot-gerrit] Change in coreboot[master]: intel/common/mp_init: Refactor MP Init code to get rid of microcode p...

[Pratikkumar V Prajapati (Code Review)]

Pratikkumar V Prajapati has uploaded this change for review. ( https://review.coreboot.org/21010


Change subject: intel/common/mp_init: Refactor MP Init code to get rid of microcode param
......................................................................

intel/common/mp_init: Refactor MP Init code to get rid of microcode param

Refactor MP Init which
- removes global variable for microcode
- remove passing microcode patch pointer as param
- uses device_t data pointer for microcode pointer usage

Change-Id: Ib03bb4a3063d243d97b132e0dc288ef3868a5a7b
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati at intel.com>
---
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/include/intelblocks/mp_init.h
M src/soc/intel/skylake/cpu.c
3 files changed, 16 insertions(+), 29 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/21010/1

diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 7e57b79..a5138eb 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -27,24 +27,21 @@
 #include <intelblocks/msr.h>
 #include <soc/cpu.h>
 
-static const void *microcode_patch;
-
 /* SoC override function */
-__attribute__((weak)) void soc_core_init(device_t dev, const void *microcode)
+__attribute__((weak)) void soc_core_init(device_t dev)
 {
 	/* no-op */
 }
 
-__attribute__((weak)) void soc_init_cpus(struct bus *cpu_bus,
-				const void *microcode)
+__attribute__((weak)) void soc_init_cpus(struct bus *cpu_bus)
 {
 	/* no-op */
 }
 
-static  void init_one_cpu(device_t dev)
+static void init_one_cpu(device_t dev)
 {
-	soc_core_init(dev, microcode_patch);
-	intel_microcode_load_unlocked(microcode_patch);
+	soc_core_init(dev);
+	intel_microcode_load_unlocked(dev->data);
 }
 
 static struct device_operations cpu_dev_ops = {
@@ -102,7 +99,10 @@
  */
 void get_microcode_info(const void **microcode, int *parallel)
 {
-	*microcode = microcode_patch;
+	device_t dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
+	assert(dev != NULL);
+
+	*microcode = dev->data;
 	*parallel = 1;
 }
 
@@ -111,23 +111,10 @@
 	device_t dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
 	assert(dev != NULL);
 
-	microcode_patch = intel_microcode_find();
-	intel_microcode_load_unlocked(microcode_patch);
+	dev->data = intel_microcode_find();
+	intel_microcode_load_unlocked(dev->data);
 
-	dev->data = microcode_patch;
-	/*
-	 * TODO: This parameter "microcode_patch" should be removed
-	 * in this function call once the following two cases are resolved -
-	 *
-	 * 1) SGX enabling for the BSP issue gets solved, due to which
-	 * configure_sgx() function is kept inside soc/cpu.c soc_init_cpus().
-	 * 2) uCode loading after SMM relocation is deleted inside
-	 * per_cpu_smm_trigger() mp_ops callback function in soc/cpu.c,
-	 * since as per current BWG, uCode loading can be done after
-	 * all feature programmings are done. There is no specific
-	 * recommendation to do it after SMM Relocation.
-	 */
-	soc_init_cpus(dev->link_list, microcode_patch);
+	soc_init_cpus(dev->link_list);
 }
 
 /* Ensure to re-program all MTRRs based on DRAM resource settings */
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index 1e5531c..7118d70 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -62,7 +62,7 @@
  * In this function SOC must perform CPU feature programming
  * during Ramstage phase.
  */
-void soc_core_init(device_t dev, const void *microcode);
+void soc_core_init(device_t dev);
 
 /*
  * In this function SOC must fill required mp_ops params, also it
@@ -72,6 +72,6 @@
  * Also, if there is any other SOC specific functionalities to be
  * implemented before or after MP Init, it can be done here.
  */
-void soc_init_cpus(struct bus *cpu_bus, const void *microcode);
+void soc_init_cpus(struct bus *cpu_bus);
 
 #endif	/* SOC_INTEL_COMMON_BLOCK_MP_INIT_H */
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index e20e5a0..9ade614 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -407,7 +407,7 @@
 }
 
 /* All CPUs including BSP will run the following function. */
-void soc_core_init(device_t cpu, const void *microcode)
+void soc_core_init(device_t cpu)
 {
 	/* Clear out pending MCEs */
 	configure_mca();
@@ -491,7 +491,7 @@
 	.post_mp_init = post_mp_init,
 };
 
-void soc_init_cpus(struct bus *cpu_bus, const void *microcode)
+void soc_init_cpus(struct bus *cpu_bus)
 {
 	if (mp_init_with_smm(cpu_bus, &mp_ops))
 		printk(BIOS_ERR, "MP initialization failure.\n");

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib03bb4a3063d243d97b132e0dc288ef3868a5a7b
Gerrit-Change-Number: 21010
Gerrit-PatchSet: 1
Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
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