[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Move LPC lock down config after PCI enumeration

Subrata Banik (Code Review) gerrit at coreboot.org
Mon Aug 14 12:56:55 CEST 2017


Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/21000

to look at the new patch set (#2).

Change subject: soc/intel/skylake: Move LPC lock down config after PCI enumeration
......................................................................

soc/intel/skylake: Move LPC lock down config after PCI enumeration

This patch to ensure that coreboot is meeting Intel Silicon
recommendation to performing register lockdown.

TEST=Ensure LPC register 0xDC bit 1 and 7 is set.

Change-Id: I705a3a3c6ddc72ae7895419442d67b82f541edee
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/skylake/Makefile.inc
M src/soc/intel/skylake/finalize.c
A src/soc/intel/skylake/lockdown.c
3 files changed, 69 insertions(+), 24 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/21000/2
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I705a3a3c6ddc72ae7895419442d67b82f541edee
Gerrit-Change-Number: 21000
Gerrit-PatchSet: 2
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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