<p>Subrata Banik <strong>uploaded patch set #2</strong> to this change.</p><p><a href="https://review.coreboot.org/21000">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/skylake: Move LPC lock down config after PCI enumeration<br><br>This patch to ensure that coreboot is meeting Intel Silicon<br>recommendation to performing register lockdown.<br><br>TEST=Ensure LPC register 0xDC bit 1 and 7 is set.<br><br>Change-Id: I705a3a3c6ddc72ae7895419442d67b82f541edee<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/skylake/Makefile.inc<br>M src/soc/intel/skylake/finalize.c<br>A src/soc/intel/skylake/lockdown.c<br>3 files changed, 69 insertions(+), 24 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/21000/2</pre><p>To view, visit <a href="https://review.coreboot.org/21000">change 21000</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21000"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newpatchset </div>
<div style="display:none"> Gerrit-Change-Id: I705a3a3c6ddc72ae7895419442d67b82f541edee </div>
<div style="display:none"> Gerrit-Change-Number: 21000 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>