[coreboot-gerrit] Change in coreboot[master]: rockchip: rk3399: Correct rk3399 pmu gpio pull setting

[Lin Huang (Code Review)]

Lin Huang has uploaded this change for review. ( https://review.coreboot.org/20871


Change subject: rockchip: rk3399: Correct rk3399 pmu gpio pull setting
......................................................................

rockchip: rk3399: Correct rk3399 pmu gpio pull setting

In rk3399 pmu gpio pull register there have enable bit,
we need to handle these bit to get right setting.

BRANCH=None
BUG=None
TEST=boot from scarlet

Change-Id: Ibe391273d58ab35df993e149187d67497fcf2acc
Signed-off-by: Lin Huang <hl at rock-chips.com>
---
M src/soc/rockchip/common/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/20871/1

diff --git a/src/soc/rockchip/common/gpio.c b/src/soc/rockchip/common/gpio.c
index 3c77c3f..5323095 100644
--- a/src/soc/rockchip/common/gpio.c
+++ b/src/soc/rockchip/common/gpio.c
@@ -30,7 +30,7 @@
 static void gpio_set_pull(gpio_t gpio, enum gpio_pull pull)
 {
 	u32 pull_val = gpio_get_pull_val(gpio, pull);
-	if (is_pmu_gpio(gpio))
+	if (is_pmu_gpio(gpio) && IS_ENABLED(CONFIG_SOC_ROCKCHIP_RK3288))
 		clrsetbits_le32(gpio_grf_reg(gpio), 3 << (gpio.idx * 2),
 				pull_val << (gpio.idx * 2));
 	else

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ibe391273d58ab35df993e149187d67497fcf2acc
Gerrit-Change-Number: 20871
Gerrit-PatchSet: 1
Gerrit-Owner: Lin Huang <hl at rock-chips.com>
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