[coreboot-gerrit] Change in coreboot[master]: google/gru: tpm on bob: cr50: add irq clear/irq status for t...

[Patrick Georgi (Code Review)]

Patrick Georgi has uploaded a new change for review. ( https://review.coreboot.org/19434 )

Change subject: google/gru: tpm on bob: cr50: add irq clear/irq status for tpm irq
......................................................................

google/gru: tpm on bob: cr50: add irq clear/irq status for tpm irq

BUG=b:35647967
TEST=boot from bob

Change-Id: I756513f02ac13e159d5b8b1ac2346fa42cf3c219
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: cf18ed7b8fdf11594f812e5c48a2bd0fde5cb820
Original-Change-Id: I50c053ab7a6f6c14daee4fb2ab1cdcaeee2d67da
Original-Signed-off-by: Jeffy Chen <jeffy.chen at rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/452286
Original-Commit-Ready: Caesar Wang <wxt at rock-chips.com>
Original-Tested-by: Caesar Wang <wxt at rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
M src/mainboard/google/gru/board.h
M src/mainboard/google/gru/bootblock.c
M src/mainboard/google/gru/chromeos.c
3 files changed, 14 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/19434/1

diff --git a/src/mainboard/google/gru/board.h b/src/mainboard/google/gru/board.h
index 7880cca..8acbe34 100644
--- a/src/mainboard/google/gru/board.h
+++ b/src/mainboard/google/gru/board.h
@@ -28,6 +28,7 @@
 #define GPIO_P15V_EN	GPIO(0, B, 2)
 #define GPIO_P30V_EN	GPIO(0, B, 4)
 #define GPIO_P18V_AUDIO_PWREN	GPIO(0, A, 2)
+#define GPIO_TPM_IRQ	GPIO(0, A, 5)
 
 void setup_chromeos_gpios(void);
 
diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c
index d76ec8b..4320fce 100644
--- a/src/mainboard/google/gru/bootblock.c
+++ b/src/mainboard/google/gru/bootblock.c
@@ -100,6 +100,8 @@
 		rockchip_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1500*KHz);
 
 		write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0);
+
+		gpio_input_irq(GPIO_TPM_IRQ, IRQ_TYPE_EDGE_RISING);
 	} else {
 		gpio_input(GPIO(1, B, 7));	/* I2C0_SDA remove pull-up */
 		gpio_input(GPIO(1, C, 0));	/* I2C0_SCL remove pull-up */
diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c
index d9e5e28..b28e9fc 100644
--- a/src/mainboard/google/gru/chromeos.c
+++ b/src/mainboard/google/gru/chromeos.c
@@ -17,6 +17,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <tpm.h>
 
 #include "board.h"
 
@@ -35,6 +36,9 @@
 		{GPIO_EC_IN_RW.raw, ACTIVE_HIGH, -1, "EC in RW"},
 		{GPIO_EC_IRQ.raw, ACTIVE_LOW, -1, "EC interrupt"},
 		{GPIO_RESET.raw, ACTIVE_HIGH, -1, "reset"},
+#if IS_ENABLED(CONFIG_GRU_HAS_TPM2)
+		{GPIO_TPM_IRQ.raw, ACTIVE_HIGH, -1, "TPM interrupt"},
+#endif
 	};
 
 	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
@@ -46,3 +50,10 @@
 	gpio_input_pullup(GPIO_EC_IN_RW);
 	gpio_input_pullup(GPIO_EC_IRQ);
 }
+
+#if IS_ENABLED(CONFIG_GRU_HAS_TPM2)
+int tis_plat_irq_status(void)
+{
+	return gpio_irq_status(GPIO_TPM_IRQ);
+}
+#endif

-- 
To view, visit https://review.coreboot.org/19434
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I756513f02ac13e159d5b8b1ac2346fa42cf3c219
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Patrick Georgi <pgeorgi at google.com>