[coreboot-gerrit] Change in coreboot[master]: [WIP]soc/intel/common/block: Add Intel PMC support

[Shaunak Saha (Code Review)]

Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/19349 )

Change subject: [WIP]soc/intel/common/block: Add Intel PMC support
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Patch Set 1:

(4 comments)

https://review.coreboot.org/#/c/19349/1/src/soc/intel/common/block/include/intelblocks/pmc.h
File src/soc/intel/common/block/include/intelblocks/pmc.h:

PS1, Line 16:  SOC_INTEL_COMMON_PMC_H
> SOC_INTEL_COMMON_BLOCK_PMC_H
Will Fix


https://review.coreboot.org/#/c/19349/1/src/soc/intel/common/block/pmc/pmc.c
File src/soc/intel/common/block/pmc/pmc.c:

PS1, Line 251: clear_pmc_status
> pmc_clean_status
Will Fix.


PS1, Line 266: acpi_get_gpe
> pmc_acpi_get_gpe
This is actually decalred in src/arch/x86/include/arch/acpi.h and as weak in acpi.c so i didnt wanted to disturb that or else even non intel soc's will also get effected.


Line 350: }
> we don't have PMRWBASE and ACPI Base programming as part of common code?
Programming of those registers are a bit different in big and small core. I tried to make a single function but it was making the function unnecessarily complicated and difficult to understand.So thought it may be good to put in soc code as of now.


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Gerrit-MessageType: comment
Gerrit-Change-Id: Ic3d96fc23a98c30e8ea0969a7be09d217eeaa889
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-HasComments: Yes