[coreboot-gerrit] Change in coreboot[master]: amd/pi/00670F00: Add generic romstage

Marc Jones (Code Review) gerrit at coreboot.org
Sat Apr 8 01:02:24 CEST 2017


Marc Jones has posted comments on this change. ( https://review.coreboot.org/18495 )

Change subject: amd/pi/00670F00: Add generic romstage
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Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/18495/5/src/cpu/amd/pi/00670F00/romstage.c
File src/cpu/amd/pi/00670F00/romstage.c:

PS5, Line 42: /* Entry from the mainboard. */
            : void romstage_common(void)
> Why are you using a callback instead of just having it in cache_as_ram_stag
Because the mainboard may need a chance to do something before the common code. I model after the baytrial, but maybe I should be doing something different.


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Gerrit-MessageType: comment
Gerrit-Change-Id: If66ac0e4b3c088f138b9282546ed1ec2d861dd74
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
Gerrit-Reviewer: Marc Jones <marc at marcjonesconsulting.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins)
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