[coreboot-gerrit] Change in coreboot[master]: AGESA f14: Fix memory clock register decoding

[Martin Roth (Code Review)]

Martin Roth has posted comments on this change. ( https://review.coreboot.org/19042 )

Change subject: AGESA f14: Fix memory clock register decoding
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Patch Set 3:

(1 comment)

https://review.coreboot.org/#/c/19042/3/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c
File src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c:

PS3, Line 1754:   return (UINT8) ((Speed == DDR800_FREQUENCY) ? 6 : (Speed == DDR1066_FREQUENCY) ? 10 :
              :    (Speed == DDR1333_FREQUENCY) ? 14 : 6);
I guess I don't understand the reason for the change.  It seems to give the same values for these frequencies as the other algorithm.  Unless we want to go through and remove all of the other frequencies from everywhere else in the code, I'd just leave it.

Here are the other frequencies that we'd be removing support for:
DDR400_FREQUENCY, DDR533_FREQUENCY, DDR1333_FREQUENCY,
DDR1600_FREQUENCY, DDR1866_FREQUENCY


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Gerrit-MessageType: comment
Gerrit-Change-Id: I2dfcf1950883836499ea2ca95f9eb72ccdfb979c
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Kyösti Mälkki <kyosti.malkki at gmail.com>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-HasComments: Yes