[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Set sdcard card detect (CD) host owner...
Venkateswarlu V Vinjamuri (Code Review)
gerrit at coreboot.org
Wed Apr 5 01:29:26 CEST 2017
Venkateswarlu V Vinjamuri has uploaded a new change for review. ( https://review.coreboot.org/19129 )
Change subject: soc/intel/apollolake: Set sdcard card detect (CD) host ownership
......................................................................
soc/intel/apollolake: Set sdcard card detect (CD) host ownership
Currently sdcard CD gpio is always owned by the host. Due
to this sdcard detection fails during initial boot process
and OS fails to boot from sdcard.
This implements change in ownership from acpi to host when
kernel starts booting.
BUG=b:35648535
TEST=Check OS boot from sdcard.
Change-Id: I2fe0c2ed8462558fcfa5de50570de53ecac92d08
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
---
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/acpi/globalnvs.asl
M src/soc/intel/apollolake/acpi/gpiolib.asl
M src/soc/intel/apollolake/acpi/scs.asl
M src/soc/intel/apollolake/gpio.c
M src/soc/intel/apollolake/include/soc/gpio.h
M src/soc/intel/apollolake/include/soc/nvs.h
7 files changed, 95 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/19129/1
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 7c3f313..da2075d 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -30,6 +30,7 @@
#include <soc/pci_devs.h>
#include <string.h>
#include <soc/gpio.h>
+#include <gpio.h>
#include "chip.h"
#define CSTATE_RES(address_space, width, offset, address) \
@@ -185,9 +186,15 @@
if (cfg->prt0_gpio != GPIO_PRT0_UDEF)
gnvs->prt0 = (uintptr_t)gpio_dwx_address(cfg->prt0_gpio);
- /* Assign sdcard cd address if GPIO is defined in devicetree */
- if (cfg->sdcard_cd_gpio)
- gnvs->scd0 = (uintptr_t)gpio_dwx_address(cfg->sdcard_cd_gpio);
+ /* Get sdcard cd GPIO portid if GPIO is defined in devicetree.
+ * Get offset of sdcard cd pin.
+ */
+ if (cfg->sdcard_cd_gpio) {
+ uint16_t pad_off;
+ pad_off = gpio_acpi_pin(cfg->sdcard_cd_gpio);
+ gnvs->scdp = gpio_get_pad_portid(cfg->sdcard_cd_gpio);
+ gnvs->scdh = pad_off % 32;
+ }
}
/* Save wake source information for calculating ACPI _SWS values */
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl
index 86a1a23..d8f54c8 100644
--- a/src/soc/intel/apollolake/acpi/globalnvs.asl
+++ b/src/soc/intel/apollolake/acpi/globalnvs.asl
@@ -39,8 +39,8 @@
NHLA, 64, // 0x19 - 0x20 - NHLT Address
NHLL, 32, // 0x21 - 0x24 - NHLT Length
PRT0, 32, // 0x25 - 0x28 - PERST_0 Address
- SCD0, 32, // 0x29 - 0x2D - SD_CD Address
-
+ SCDP, 8, // 0x29 - SD_CD GPIO portid
+ SCDH, 8, // 0x2A - Offset of SD_CD in HOSTSW_REG
/* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
Offset (0x100),
#include <vendorcode/google/chromeos/acpi/gnvs.asl>
diff --git a/src/soc/intel/apollolake/acpi/gpiolib.asl b/src/soc/intel/apollolake/acpi/gpiolib.asl
index cec6d36..837c677 100644
--- a/src/soc/intel/apollolake/acpi/gpiolib.asl
+++ b/src/soc/intel/apollolake/acpi/gpiolib.asl
@@ -15,6 +15,8 @@
Scope (\_SB)
{
+ Name (HSAD, 0) /* store HOSTSW_REG address */
+
/* Get Pad Configuration DW0 register value */
Method (GPC0, 0x1, Serialized)
{
@@ -64,4 +66,49 @@
}
Store (Arg1, TEMP)
}
+
+ /* Get DW0 address of a given Pad */
+ Method (GDW0, 0x2, Serialized)
+ {
+ /* Arg0 - GPIO community */
+ /* Arg1 - GPIO offset */
+ Store (0, Local1)
+ Or( Or (ShiftLeft (Arg0, 16), CONFIG_IOSF_BASE_ADDRESS),
+ Local1, Local1)
+ Or( Or (PAD_CFG_BASE, Multiply (Arg1, 8)), Local1, Local1)
+ Return (Local1)
+ }
+
+ /* Calculate HOSTSW_REG address */
+ Method (CHSA, 0x1, Serialized)
+ {
+ /* arg0 - pad offset */
+ Add (HOSTSW_OWN_REG_BASE, Multiply (Divide (arg0, 32),4), Local0)
+ Store (Local0, HSAD)
+ }
+
+ /* Get Host ownership register of GPIO Community */
+ Method (GHO, 0x1, Serialized)
+ {
+ /* Arg0 - GPIO Community */
+ OperationRegion (SHO0, SystemMemory, Or ( Or
+ (CONFIG_IOSF_BASE_ADDRESS, ShiftLeft(Arg0, 16)), HSAD), 4)
+ Field (SHO0, AnyAcc, NoLock, Preserve) {
+ TEMP, 32
+ }
+ Return (TEMP)
+ }
+
+ /* Set Host ownership register of GPIO Community */
+ Method (SHO, 0x2, Serialized)
+ {
+ /* Arg0 - GPIO Community */
+ /* Arg1 - Value for Host Own register */
+ OperationRegion (SHO0, SystemMemory, Or ( Or
+ (CONFIG_IOSF_BASE_ADDRESS, ShiftLeft(Arg0, 16)), HSAD), 4)
+ Field (SHO0, AnyAcc, NoLock, Preserve) {
+ TEMP, 32
+ }
+ Store (Arg1, TEMP)
+ }
}
diff --git a/src/soc/intel/apollolake/acpi/scs.asl b/src/soc/intel/apollolake/acpi/scs.asl
index f69f43c..6d068fb 100644
--- a/src/soc/intel/apollolake/acpi/scs.asl
+++ b/src/soc/intel/apollolake/acpi/scs.asl
@@ -115,14 +115,30 @@
Device (SDCD)
{
Name (_ADR, 0x001B0000)
+ Name (_S0W, 4) /* _S0W: S0 Device Wake State */
+ Name (SCD0, 0) /* Store SD_CD DW0 address */
+
+ /* Set the host ownership of sdcard cd during kernel boot */
+ Method (_INI, 0)
+ {
+ /* Check SDCard CD port is valid */
+ If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDH, 0) ))
+ {
+ Store (GDW0 (\SCDP, \SCDH), SCD0)
+ CHSA (\SCDH)
+ Store (\_SB.GHO (\SCDP), Local0)
+ Or (Local0, ShiftLeft(1, \SCDH), Local0)
+ \_SB.SHO (\SCDP, Local0)
+ }
+ }
Method (_PS0, 0, NotSerialized)
{
- /* Check SDCard CD pin address is valid */
- If (LNotEqual (SCD0, 0))
+ /* Check SDCard CD port is valid */
+ If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDH, 0) ))
{
/* Store DW0 into local0 to get rxstate of GPIO */
- Store (\_SB.GPC0 (\SCD0), Local0)
+ Store (\_SB.GPC0 (SCD0), Local0)
/* Extract rxstate [bit 1] of sdcard card detect pin */
And (Local0, PAD_CFG0_RX_STATE, Local0)
/* If the sdcard is present, rxstate is low.
diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c
index 7be126e..9f435d4 100644
--- a/src/soc/intel/apollolake/gpio.c
+++ b/src/soc/intel/apollolake/gpio.c
@@ -189,6 +189,16 @@
return iosf_address(comm->port, PAD_CFG_OFFSET(pad - comm->first_pad));
}
+uint8_t gpio_get_pad_portid(const uint16_t pad)
+{
+ /* Get the port id of given pad
+ * pad - GPIO number
+ * returns - given pad port id
+ */
+ const struct pad_community *comm = gpio_get_community(pad);
+ return comm->port;
+}
+
void gpio_input_pulldown(gpio_t gpio)
{
struct pad_config cfg = PAD_CFG_GPI(gpio, DN_20K, DEEP);
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index bdd3994..f1020f6 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -162,6 +162,10 @@
/* Calculate GPIO DW0 address */
void *gpio_dwx_address(const uint16_t pad);
+
+/* Get the port id of given pad */
+uint8_t gpio_get_pad_portid(const uint16_t pad);
+
/*
* Set the GPIO groups for the GPE blocks. The values from PMC register GPE_CFG
* are passed which is then mapped to proper groups for MISCCFG. This basically
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index 21ac14e..e83f783 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -39,8 +39,9 @@
uint64_t nhla; /* 0x19 - 0x20 - NHLT Address */
uint32_t nhll; /* 0x21 - 0x24 - NHLT Length */
uint32_t prt0; /* 0x25 - 0x28 - PERST_0 Address */
- uint32_t scd0; /* 0x29 - 0x2D - SD_CD Address */
- uint8_t unused[211];
+ uint8_t scdp; /* 0x29 - SD_CD GPIO portid */
+ uint8_t scdh; /* 0x2A - Offset of SD_CD in HOSTSW_REG */
+ uint8_t unused[213];
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;
--
To view, visit https://review.coreboot.org/19129
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I2fe0c2ed8462558fcfa5de50570de53ecac92d08
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
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