[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Add tsc_freq.c to verstage

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19094 )

Change subject: soc/intel/skylake: Add tsc_freq.c to verstage
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Patch Set 2:

Build Successful 

https://qa.coreboot.org/job/coreboot-checkpatch/7178/ : SUCCESS

https://qa.coreboot.org/job/coreboot-gerrit/51234/ : SUCCESS

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Gerrit-MessageType: comment
Gerrit-Change-Id: I03edebe394522516b46125fae1a17e9a06fd5f45
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-HasComments: No