[coreboot-gerrit] Change in coreboot[master]: drivers/spi/tpm: try to wake cr50 if it is asleep
Furquan Shaikh (Code Review)
gerrit at coreboot.org
Tue Apr 4 21:11:22 CEST 2017
Hello Julius Werner,
I'd like you to do a code review. Please visit
https://review.coreboot.org/19112
to review the following change.
Change subject: drivers/spi/tpm: try to wake cr50 if it is asleep
......................................................................
drivers/spi/tpm: try to wake cr50 if it is asleep
BUG=b:35775002
TEST=boot from bob
Change-Id: I6324f3c02da55a8527f085ba463cbb1f4fb5dc2e
Signed-off-by: Jeffy Chen <jeffy.chen at rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/452283
Commit-Ready: Caesar Wang <wxt at rock-chips.com>
Tested-by: Caesar Wang <wxt at rock-chips.com>
Reviewed-by: Julius Werner <jwerner at chromium.org>
---
M src/drivers/spi/tpm/tpm.c
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/19112/1
diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c
index fd924f4..341419c 100644
--- a/src/drivers/spi/tpm/tpm.c
+++ b/src/drivers/spi/tpm/tpm.c
@@ -121,6 +121,12 @@
*/
mdelay(10);
+ /* Try to wake cr50 if it is asleep. */
+ tpm_if.cs_assert(tpm_if.slave);
+ udelay(1);
+ tpm_if.cs_deassert(tpm_if.slave);
+ udelay(100);
+
/*
* The first byte of the frame header encodes the transaction type
* (read or write) and transfer size (set to lentgh - 1), limited to
--
To view, visit https://review.coreboot.org/19112
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6324f3c02da55a8527f085ba463cbb1f4fb5dc2e
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Julius Werner <jwerner at chromium.org>
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