[coreboot-gerrit] Change in coreboot[master]: [WIP] common/dptf: Add thermal trip points change event handler

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has uploaded a new change for review. ( https://review.coreboot.org/19088 )

Change subject: [WIP] common/dptf: Add thermal trip points change event handler
......................................................................

[WIP] common/dptf: Add thermal trip points change event handler

This patch adds the thermal trip points change event handler
for different modes like tablet and notebook mode.

BUG=None
BRANCH=None
TEST=Built for poppy.

Change-Id: I207ed1c415e22e8fccede0f1373af67a072ddea1
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
M src/soc/intel/common/acpi/dptf/thermal.asl
1 file changed, 89 insertions(+), 8 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/19088/1

diff --git a/src/soc/intel/common/acpi/dptf/thermal.asl b/src/soc/intel/common/acpi/dptf/thermal.asl
index ce220c4..fcfe2d5 100644
--- a/src/soc/intel/common/acpi/dptf/thermal.asl
+++ b/src/soc/intel/common/acpi/dptf/thermal.asl
@@ -58,6 +58,23 @@
 #endif
 }
 
+/* Thermal Trip Points Change Event Handler */
+Method (TPET)
+{
+#ifdef DPTF_TSR0_SENSOR_ID
+	Notify (^TSR0, 0x81)
+#endif
+#ifdef DPTF_TSR01_SENSOR_ID
+	Notify (^TSR1, 0x81)
+#endif
+#ifdef DPTF_TSR2_SENSOR_ID
+	Notify (^TSR2, 0x81)
+#endif
+#ifdef DPTF_TSR3_SENSOR_ID
+	Notify (^TSR3, 0x81)
+#endif
+}
+
 #ifdef DPTF_TSR0_SENSOR_ID
 Device (TSR0)
 {
@@ -84,12 +101,28 @@
 
 	Method (_PSV)
 	{
-		Return (CTOK (DPTF_TSR0_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR0_TABLET_PASSIVE))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR0_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Method (_CRT)
 	{
-		Return (CTOK (DPTF_TSR0_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR0_TABLET_CRITICAL))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR0_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Name (PATC, 2)
@@ -140,12 +173,28 @@
 
 	Method (_PSV)
 	{
-		Return (CTOK (DPTF_TSR1_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR1_TABLET_PASSIVE))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR1_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Method (_CRT)
 	{
-		Return (CTOK (DPTF_TSR1_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR1_TABLET_CRITICAL))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR1_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Name (PATC, 2)
@@ -196,12 +245,28 @@
 
 	Method (_PSV)
 	{
-		Return (CTOK (DPTF_TSR2_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR2_TABLET_PASSIVE))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR2_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Method (_CRT)
 	{
-		Return (CTOK (DPTF_TSR2_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR2_TABLET_CRITICAL))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR2_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Name (PATC, 2)
@@ -252,12 +317,28 @@
 
 	Method (_PSV)
 	{
-		Return (CTOK (DPTF_TSR3_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR3_TABLET_PASSIVE))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR3_PASSIVE))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Method (_CRT)
 	{
-		Return (CTOK (DPTF_TSR3_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
+			Return (CTOK (DPTF_TSR3_TABLET_CRITICAL))
+		} Else {
+#endif
+			Return (CTOK (DPTF_TSR3_CRITICAL))
+#ifdef EC_ENABLE_TABLET_EVENT
+		}
+#endif
 	}
 
 	Name (PATC, 2)

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I207ed1c415e22e8fccede0f1373af67a072ddea1
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>