[coreboot-gerrit] Patch merged into coreboot/master: mainboards/apollolake: Set RAPL power limit PL1 value to 12W.

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 7e10c8209ba7a88639da82bd05584dbb9340bb83
Author: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
Date:   Tue Sep 13 11:54:03 2016 +0530

    mainboards/apollolake: Set RAPL power limit PL1 value to 12W.
    
    This patch sets tuned RAPL power limit PL1 value to
    12W in acpi/dptf.asl for RAPL MSR register. With PL1
    as 12W for WebGL and stream case, we measured SoC power
    reaching upto 6W. Above 12W PL1 value, we observed that
    Soc power going above 6W. With PL1 as 12W, system is
    able to leverage full TDP capacity.
    
    BUG=chrome-os-partner:56524
    TEST=Built, booted on reef and verifed the package
    power with heavy workload.
    
    Change-Id: I8185ce890f27e29bc138ea568af536bc274fe7b8
    Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
    Reviewed-on: https://review.coreboot.org/16596
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/16596 for details.

-gerrit