[coreboot-gerrit] New patch to review for coreboot: siemens/mc_bdx1: Set serial IRQ to quiet mode
Werner Zeh (werner.zeh@siemens.com)
gerrit at coreboot.org
Thu Sep 8 07:56:45 CEST 2016
Werner Zeh (werner.zeh at siemens.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16533
-gerrit
commit f11d0baea3c294f81dd8fe0cfbe807de2845d62e
Author: Werner Zeh <werner.zeh at siemens.com>
Date: Thu Sep 8 07:17:34 2016 +0200
siemens/mc_bdx1: Set serial IRQ to quiet mode
On this mainboard serial IRQ needs to be set to quiet mode. Since it
will be set up to continuous mode in sc_init(), just set it back to
quiet mode in finalize phase.
Change-Id: If2a5e9b89328c25cf2987760d3e8d128722c07fa
Signed-off-by: Werner Zeh <werner.zeh at siemens.com>
---
src/mainboard/siemens/mc_bdx1/mainboard.c | 4 ++++
src/soc/intel/fsp_broadwell_de/include/soc/lpc.h | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/src/mainboard/siemens/mc_bdx1/mainboard.c b/src/mainboard/siemens/mc_bdx1/mainboard.c
index 8a5226b..74b6feb 100644
--- a/src/mainboard/siemens/mc_bdx1/mainboard.c
+++ b/src/mainboard/siemens/mc_bdx1/mainboard.c
@@ -33,6 +33,7 @@
#include <i210.h>
#include <soc/pci_devs.h>
#include <soc/irq.h>
+#include <soc/lpc.h>
#define MAX_PATH_DEPTH 12
#define MAX_NUM_MAPPINGS 10
@@ -120,6 +121,9 @@ static void mainboard_final(void *chip_info)
write16((spi_base + SPI_REG_OPTYPE), SPI_OPTYPE);
write32((spi_base + SPI_REG_OPMENU_L), SPI_OPMENU_LOWER);
write32((spi_base + SPI_REG_OPMENU_H), SPI_OPMENU_UPPER);
+
+ /* Set SCI to quiet mode */
+ pci_write_config8(dev, SIRQ_CNTL, SIRQ_EN | SIRQ_MODE_QUIET);
}
/** \brief This function can decide if a given MAC address is valid or not.
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h
index 30cb576..a81c59e 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h
@@ -22,6 +22,10 @@
/* LPC Interface Bridge PCI Configuration Registers */
#define REVID 0x08
#define PIRQ_RCR1 0x60
+#define SIRQ_CNTL 0x64
+#define SIRQ_EN 0x80
+#define SIRQ_MODE_QUIET 0x00
+#define SIRQ_MODE_CONT 0x40
#define PIRQ_RCR2 0x68
#define LPC_IO_DEC 0x80
#define LPC_EN 0x82
More information about the coreboot-gerrit
mailing list