[coreboot-gerrit] New patch to review for coreboot: southbridge/intel/i82801ix: transition away from device_t

[Antonello Dettori (dev@dettori.io)]

Antonello Dettori (dev at dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16403

-gerrit

commit 610d9d29fc5b7c2f83edd71c21f18228a6075b99
Author: Antonello Dettori <dev at dettori.io>
Date:   Thu Sep 1 17:04:14 2016 +0200

    southbridge/intel/i82801ix: transition away from device_t
    
    Replace the use of the old device_t definition inside
    southbridge/intel/i82801ix.
    
    The patch has been tested both with the arch/io.h definition of device_t
    enabled and disabled in order to ensure compatibility while the
    transaction takes place.
    
    Change-Id: Ibf20e6c08994b09d2a2e68a1a1d38a7a477493aa
    Signed-off-by: Antonello Dettori <dev at dettori.io>
---
 src/southbridge/intel/i82801ix/early_init.c  | 2 +-
 src/southbridge/intel/i82801ix/early_smbus.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c
index 3d94b56..c40f9b7 100644
--- a/src/southbridge/intel/i82801ix/early_init.c
+++ b/src/southbridge/intel/i82801ix/early_init.c
@@ -19,7 +19,7 @@
 
 void i82801ix_early_init(void)
 {
-	const device_t d31f0 = PCI_DEV(0, 0x1f, 0);
+	const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
 
 	/* Set up RCBA. */
 	pci_write_config32(d31f0, D31F0_RCBA, (uintptr_t)DEFAULT_RCBA | 1);
diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c
index 3cac32f..31b33e9 100644
--- a/src/southbridge/intel/i82801ix/early_smbus.c
+++ b/src/southbridge/intel/i82801ix/early_smbus.c
@@ -24,7 +24,7 @@
 
 void enable_smbus(void)
 {
-	device_t dev;
+	pci_devfn_t dev;
 
 	/* Set the SMBus device statically. */
 	dev = PCI_DEV(0x0, 0x1f, 0x3);