[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/skylake: Remove pad configuration size hardcoding

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 0068dfdcc8c2a80508cdd44909d9a2561a30a0e5
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Wed Nov 23 00:54:47 2016 +0530

    soc/intel/skylake: Remove pad configuration size hardcoding
    
    Existing GPIO driver inside coreboot use some hardcoded magic number
    to calculate gpio pad offset. Avoid this kind of hardcoding.
    
    Change-Id: I6110435574b141c57f366ccb1fbe9bf49d4dd70a
    Signed-off-by: Subrata Banik <subrata.banik at intel.com>
    Reviewed-on: https://review.coreboot.org/17571
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/17571 for details.

-gerrit