[coreboot-gerrit] Patch set updated for coreboot: sb/intel/lynxpoint: enumerate missing USB ports in ACPI

Prabal Saha (coolstarorganization@gmail.com) gerrit at coreboot.org
Tue Nov 22 02:49:51 CET 2016


Prabal Saha (coolstarorganization at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17539

-gerrit

commit e8519ada8e5794b7d7c9f73662ece3500b405c54
Author: CoolStar <coolstarorganization at gmail.com>
Date:   Thu Jul 14 12:42:11 2016 -0700

    sb/intel/lynxpoint: enumerate missing USB ports in ACPI
    
    Lynxpoint supports up to 14 USB ports with 5 at USB 3 speeds.  Enumerate
    missing port names to enable addition of board-specific details for each
    port.
    
    Change-Id: Ic90c956647f11bf4ebaf174d539a1a8b3255766b
    Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
 src/southbridge/intel/lynxpoint/acpi/usb.asl | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/southbridge/intel/lynxpoint/acpi/usb.asl b/src/southbridge/intel/lynxpoint/acpi/usb.asl
index b02cbfe..e1fdb5a 100644
--- a/src/southbridge/intel/lynxpoint/acpi/usb.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/usb.asl
@@ -56,6 +56,14 @@ Device (EHCI)
 		Device (PRT4) { Name (_ADR, 4) } // USB Port 3
 		Device (PRT5) { Name (_ADR, 5) } // USB Port 4
 		Device (PRT6) { Name (_ADR, 6) } // USB Port 5
+		Device (PRT7) { Name (_ADR, 7) } // USB Port 6
+                Device (PRT8) { Name (_ADR, 8) } // USB Port 7
+                Device (PRT9) { Name (_ADR, 9) } // USB Port 8
+                Device (PRTA) { Name (_ADR, 10) } // USB Port 9
+                Device (PRTB) { Name (_ADR, 11) } // USB Port 10
+                Device (PRTC) { Name (_ADR, 12) } // USB Port 11
+                Device (PRTD) { Name (_ADR, 13) } // USB Port 12
+                Device (PRTE) { Name (_ADR, 14) } // USB Port 13
 	}
 }
 
@@ -400,5 +408,13 @@ Device (XHCI)
 		Device (PRT4) { Name (_ADR, 4) } // USB Port 3
 		Device (PRT5) { Name (_ADR, 5) } // USB Port 4
 		Device (PRT6) { Name (_ADR, 6) } // USB Port 5
+		Device (PRT7) { Name (_ADR, 7) } // USB Port 6
+		Device (PRT8) { Name (_ADR, 8) } // USB Port 7
+		Device (PRT9) { Name (_ADR, 9) } // USB Port 8
+		Device (SSP1) { Name (_ADR, 10) }
+		Device (SSP2) { Name (_ADR, 11) }
+		Device (SSP3) { Name (_ADR, 12) }
+		Device (SSP4) { Name (_ADR, 13) }
+		Device (SSP5) { Name (_ADR, 14) }
 	}
 }



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