[coreboot-gerrit] Patch merged into coreboot/master: intel sandy/ivy: Improve DIMM replacement detection

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit e258b9a2d52bb31d99405cad4b44047022dc4007
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Fri Nov 18 19:59:23 2016 +0200

    intel sandy/ivy: Improve DIMM replacement detection
    
    When MRC cache is available, first read only the SPD unique
    identifier bytes required to detect possible DIMM replacement.
    As this is 11 vs 256 bytes with slow SMBus operations, we save
    about 70ms for every installed DIMM on normal boot path.
    
    In the DIMM replacement case this adds some 10ms per installed DIMM
    as some SPD gets read twice, but we are on slow RAM training boot path
    anyways.
    
    Change-Id: I294a56e7b7562c3dea322c644b21a15abb033870
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: https://review.coreboot.org/17491
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-by: Patrick Rudolph <siro at das-labor.org>


See https://review.coreboot.org/17491 for details.

-gerrit