[coreboot-gerrit] New patch to review for coreboot: PCI ops: Rename pcie_xx() to pci_mmio_xx()

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17530

-gerrit

commit eb179097269da85fd9a4c69035402561323a7323
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sun Oct 27 14:59:00 2013 +0200

    PCI ops: Rename pcie_xx() to pci_mmio_xx()
    
    Only intel/sch used the pcie_xx variant of name.
    
    Change-Id: I7fa65197b8165b9b0b74937f9ba455c48308da37
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/include/arch/pci_mmio_cfg.h | 50 ++++++++++++++------------------
 1 file changed, 21 insertions(+), 29 deletions(-)

diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
index 25cdae9..9243dac 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/arch/x86/include/arch/pci_mmio_cfg.h
@@ -22,7 +22,7 @@
 #define DEFAULT_PCIEXBAR	CONFIG_MMCONF_BASE_ADDRESS
 
 static inline __attribute__ ((always_inline))
-u8 pcie_read_config8(pci_devfn_t dev, unsigned int where)
+u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
@@ -30,7 +30,7 @@ u8 pcie_read_config8(pci_devfn_t dev, unsigned int where)
 }
 
 static inline __attribute__ ((always_inline))
-u16 pcie_read_config16(pci_devfn_t dev, unsigned int where)
+u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
@@ -38,7 +38,7 @@ u16 pcie_read_config16(pci_devfn_t dev, unsigned int where)
 }
 
 static inline __attribute__ ((always_inline))
-u32 pcie_read_config32(pci_devfn_t dev, unsigned int where)
+u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
@@ -46,7 +46,7 @@ u32 pcie_read_config32(pci_devfn_t dev, unsigned int where)
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
+void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
@@ -54,7 +54,7 @@ void pcie_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
+void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
@@ -62,7 +62,7 @@ void pcie_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
+void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
@@ -70,42 +70,34 @@ void pcie_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_or_config8(pci_devfn_t dev, unsigned int where, u8 ormask)
+void pci_mmio_or_config8(pci_devfn_t dev, unsigned int where, u8 ormask)
 {
-	u8 value = pcie_read_config8(dev, where);
-	pcie_write_config8(dev, where, value | ormask);
+	u8 value = pci_mmio_read_config8(dev, where);
+	pci_mmio_write_config8(dev, where, value | ormask);
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_or_config16(pci_devfn_t dev, unsigned int where, u16 ormask)
+void pci_mmio_or_config16(pci_devfn_t dev, unsigned int where, u16 ormask)
 {
-	u16 value = pcie_read_config16(dev, where);
-	pcie_write_config16(dev, where, value | ormask);
+	u16 value = pci_mmio_read_config16(dev, where);
+	pci_mmio_write_config16(dev, where, value | ormask);
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_or_config32(pci_devfn_t dev, unsigned int where, u32 ormask)
+void pci_mmio_or_config32(pci_devfn_t dev, unsigned int where, u32 ormask)
 {
-	u32 value = pcie_read_config32(dev, where);
-	pcie_write_config32(dev, where, value | ormask);
+	u32 value = pci_mmio_read_config32(dev, where);
+	pci_mmio_write_config32(dev, where, value | ormask);
 }
 
-#define pci_mmio_read_config8 	pcie_read_config8
-#define pci_mmio_read_config16	pcie_read_config16
-#define pci_mmio_read_config32	pcie_read_config32
-
-#define pci_mmio_write_config8 	pcie_write_config8
-#define pci_mmio_write_config16	pcie_write_config16
-#define pci_mmio_write_config32	pcie_write_config32
-
 #if CONFIG_MMCONF_SUPPORT_DEFAULT
-#define pci_read_config8 	pcie_read_config8
-#define pci_read_config16	pcie_read_config16
-#define pci_read_config32	pcie_read_config32
+#define pci_read_config8 	pci_mmio_read_config8
+#define pci_read_config16	pci_mmio_read_config16
+#define pci_read_config32	pci_mmio_read_config32
 
-#define pci_write_config8 	pcie_write_config8
-#define pci_write_config16	pcie_write_config16
-#define pci_write_config32	pcie_write_config32
+#define pci_write_config8 	pci_mmio_write_config8
+#define pci_write_config16	pci_mmio_write_config16
+#define pci_write_config32	pci_mmio_write_config32
 #endif
 
 #endif /* CONFIG_MMCONF_SUPPORT */