[coreboot-gerrit] New patch to review for coreboot: nb/intel/sandybridge/raminit: Support more than CL11

[Patrick Rudolph (siro@das-labor.org)]

Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17502

-gerrit

commit 7c92c4c94c40641995ab9cc2690b1be80fb90abf
Author: Patrick Rudolph <siro at das-labor.org>
Date:   Sat Nov 19 15:46:42 2016 +0100

    nb/intel/sandybridge/raminit: Support more than CL11
    
    The code won't allow anything beyond CL11.
    Add support for CAS Latencies up to CL18.
    Fix a bug in mr0 which had the wrong bit set for CL11+.
    Increase the CAS bitmask to allow up to CL18.
    Use defines instead of hardcoding min and max CAS latencies.
    
    TO TEST:
    You need a DIMM that supports CL11+.
    Hardcode CL or increase frequency.
    
    Change-Id: I576ee20a923fd63d360a6a8e86c675dd069d53d6
    Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
 src/northbridge/intel/sandybridge/raminit.c | 41 +++++++++++++++--------------
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index f631ad2..a34fbfc 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -199,6 +199,8 @@ typedef struct ramctr_timing_st {
 #define MAX_TIMC 127
 #define MAX_TIMB 511
 #define MAX_TIMA 127
+#define MAX_CAS 18
+#define MIN_CAS 4
 
 #define MAKE_ERR ((channel<<16)|(slotrank<<8)|1)
 #define GET_ERR_CHANNEL(x) (x>>16)
@@ -463,7 +465,7 @@ static void dram_find_common_params(ramctr_timing *ctrl)
 	int channel, slot;
 	dimm_info *dimms = &ctrl->info;
 
-	ctrl->cas_supported = 0xff;
+	ctrl->cas_supported = (1 << (MAX_CAS - MIN_CAS)) - 1;
 	valid_dimms = 0;
 	FOR_ALL_CHANNELS for (slot = 0; slot < 2; slot++) {
 		const dimm_attr *dimm = &dimms->dimm[channel][slot];
@@ -737,16 +739,16 @@ static void dram_timing(ramctr_timing * ctrl)
 	val = (ctrl->tAA + ctrl->tCK - 1) / ctrl->tCK;
 	printk(BIOS_DEBUG, "Minimum  CAS latency   : %uT\n", val);
 	/* Find lowest supported CAS latency that satisfies the minimum value */
-	while (!((ctrl->cas_supported >> (val - 4)) & 1)
-	       && (ctrl->cas_supported >> (val - 4))) {
+	while (!((ctrl->cas_supported >> (val - MIN_CAS)) & 1)
+	       && (ctrl->cas_supported >> (val - MIN_CAS))) {
 		val++;
 	}
 	/* Is CAS supported */
-	if (!(ctrl->cas_supported & (1 << (val - 4)))) {
+	if (!(ctrl->cas_supported & (1 << (val - MIN_CAS)))) {
 		printk(BIOS_ERR, "CAS %uT not supported. ", val);
-		val = 18;
+		val = MAX_CAS;
 		/* Find highest supported CAS latency */
-		while (!((ctrl->cas_supported >> (val - 4)) & 1))
+		while (!((ctrl->cas_supported >> (val - MIN_CAS)) & 1))
 			val--;
 
 		printk(BIOS_ERR, "Using CAS %uT instead.\n", val);
@@ -1442,29 +1444,28 @@ static void write_mrreg(ramctr_timing *ctrl, int channel, int slotrank,
 
 static u32 make_mr0(ramctr_timing * ctrl, u8 rank)
 {
-	u16 mr0reg, mch_cas, mch_wr;
+	u16 mr0reg;
 	static const u8 mch_wr_t[12] = { 1, 2, 3, 4, 0, 5, 0, 6, 0, 7, 0, 0 };
 
+	mr0reg = 0;
 	/* DLL Reset - self clearing - set after CLK frequency has been changed */
-	mr0reg = 0x100;
+	mr0reg |= 1 << 8;
 
-	// Convert CAS to MCH register friendly
+	/* Program CAS Latency */
 	if (ctrl->CAS < 12) {
-		mch_cas = (u16) ((ctrl->CAS - 4) << 1);
+		mr0reg |= (ctrl->CAS - MIN_CAS) << 4;
 	} else {
-		mch_cas = (u16) (ctrl->CAS - 12);
-		mch_cas = ((mch_cas << 1) | 0x1);
+		mr0reg |= 1 << 2;
+		mr0reg |= (ctrl->CAS - 12) << 4;
 	}
 
-	// Convert tWR to MCH register friendly
-	mch_wr = mch_wr_t[ctrl->tWR - 5];
+	/* Program Write recovery for autoprecharge */
+	mr0reg |= (mch_wr_t[ctrl->tWR - 5] << 9);
 
-	mr0reg = (mr0reg & ~0x4) | (mch_cas & 0x1);
-	mr0reg = (mr0reg & ~0x70) | ((mch_cas & 0xe) << 3);
-	mr0reg = (mr0reg & ~0xe00) | (mch_wr << 9);
-
-	// Precharge PD - Fast (desktop) 0x1 or slow (mobile) 0x0 - mostly power-saving feature
-	mr0reg = (mr0reg & ~0x1000) | (!ctrl->mobile << 12);
+	/* Precharge PD - Fast (desktop) 0x1 or slow (mobile) 0x0
+	 * mostly power-saving feature */
+	if (!ctrl->mobile)
+		mr0reg |= 1 << 12;
 	return mr0reg;
 }