[coreboot-gerrit] New patch to review for coreboot: intel car: Move pre-ram stack guard lower

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17501

-gerrit

commit 95a836febd8fcfa2d2252af693da6a5be154863c
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sat Nov 19 16:39:21 2016 +0200

    intel car: Move pre-ram stack guard lower
    
    SPD data alone consumes 0x400 of pre-ram stack, so the guard was
    initially set too high, printing spurious "smashed stack detected"
    messages at end of romstage.
    
    Use the same stack size as haswell.
    
    Change-Id: I24fff6228bc5207750a3c4bf8cf34e91cf35e716
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/intel/car/romstage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index d04b6e1..4f60034 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -16,7 +16,7 @@
 #include <cpu/intel/romstage.h>
 #include <program_loading.h>
 
-#define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x800
+#define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000
 
 void * asmlinkage romstage_main(unsigned long bist)
 {