[coreboot-gerrit] Patch set updated for coreboot: intel/kblrvp: Program I/O expander

[Naresh Solanki (naresh.solanki@intel.com)]

Naresh Solanki (naresh.solanki at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17338

-gerrit

commit 9c7a76ad6e64c7944a5092cc30882403c8755f6e
Author: Naresh G Solanki <naresh.solanki at intel.com>
Date:   Wed Nov 9 18:53:53 2016 +0530

    intel/kblrvp: Program I/O expander
    
    Program I/O expander connected on I2C bus 4
    
    Change-Id: I1a431f50e7b06446399a7d7cb9490615818147e7
    Signed-off-by: Naresh G Solanki <naresh.solanki at intel.com>
---
 src/mainboard/intel/kblrvp/gpio.h     | 11 +++++++++
 src/mainboard/intel/kblrvp/ramstage.c | 45 ++++++++++++++++++++++++++++++++---
 2 files changed, 53 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/intel/kblrvp/gpio.h b/src/mainboard/intel/kblrvp/gpio.h
index 5e251d8..01897a1 100644
--- a/src/mainboard/intel/kblrvp/gpio.h
+++ b/src/mainboard/intel/kblrvp/gpio.h
@@ -20,6 +20,17 @@
 #include <soc/gpe.h>
 #include <soc/gpio.h>
 
+/* TCA6424A  I/O Expander */
+#define IO_EXPANDER_BUS		4
+#define IO_EXPANDER_0_ADDR	0x22
+#define IO_EXPANDER_P0CONF	0x0C	/* Port 0 conf offset */
+#define IO_EXPANDER_P0DOUT	0x04	/* Port 0 data offset */
+#define IO_EXPANDER_P1CONF	0x0D
+#define IO_EXPANDER_P1DOUT	0x05
+#define IO_EXPANDER_P2CONF	0x0E
+#define IO_EXPANDER_P2DOUT	0x06
+#define IO_EXPANDER_1_ADDR	0x23
+
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE		GPE0_LAN_WAK
 
diff --git a/src/mainboard/intel/kblrvp/ramstage.c b/src/mainboard/intel/kblrvp/ramstage.c
index 6a509b7..d33c967 100644
--- a/src/mainboard/intel/kblrvp/ramstage.c
+++ b/src/mainboard/intel/kblrvp/ramstage.c
@@ -13,20 +13,23 @@
  * GNU General Public License for more details.
  */
 
+#include <bootstate.h>
+#include <console/console.h>
+#include <device/i2c.h>
 #include <soc/ramstage.h>
 #include "gpio.h"
 
 void mainboard_silicon_init_params(FSP_SIL_UPD *params)
 {
-	u8 i;
+	size_t i;
 	/* Configure pads prior to SiliconInit() in case there's any
 	 * dependencies during hardware initialization. */
 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 	params->CdClock = 3;
 
 	/* Set proper OC for various USB ports*/
-	u8 usb2_oc[] = { 0x0, 0x2, 0x8, 0x8, 0x2, 0x8, 0x8, 0x8, 0x1, 0x8};
-	u8 usb3_oc[] = { 0x0, 0x8, 0x8, 0x1, 0x8, 0x8 };
+	u8 usb2_oc[] = {0x0, 0x2, 0x8, 0x8, 0x2, 0x8, 0x8, 0x8, 0x1, 0x8};
+	u8 usb3_oc[] = {0x0, 0x8, 0x8, 0x1, 0x8, 0x8};
 
 	for (i = 0; i < ARRAY_SIZE(usb2_oc); i++)
 		params->Usb2OverCurrentPin[i] = usb2_oc[i];
@@ -34,3 +37,39 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params)
 	for (i = 0; i < ARRAY_SIZE(usb3_oc); i++)
 		params->Usb3OverCurrentPin[i] = usb3_oc[i];
 }
+
+static void ioexpander_init(void *unused)
+{
+	printk(BIOS_DEBUG, "Programming TCA6424A I/O expander\n");
+
+	/* I/O Expander 1, Port 0 Data */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_0_ADDR, IO_EXPANDER_P0DOUT,
+		0xF7);
+	/* Port 0 Configuration */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_0_ADDR, IO_EXPANDER_P0CONF,
+		0xE0);
+
+	/* Port 1 Data */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_0_ADDR, IO_EXPANDER_P1DOUT,
+		0x9E);
+	/* Port 1 Configuration */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_0_ADDR, IO_EXPANDER_P1CONF,
+		0x8C);
+
+	/* Port 2 Data */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_0_ADDR, IO_EXPANDER_P2DOUT,
+		0xDA);
+	/* Port 2 Configuration */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_0_ADDR, IO_EXPANDER_P2CONF,
+		0x08);
+
+	/* I/O Expander 2, Port 0 Data */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_1_ADDR, IO_EXPANDER_P0DOUT,
+		0xFF);
+	/* Port 0 Configuration */
+	i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_1_ADDR, IO_EXPANDER_P0CONF,
+		0x00);
+
+}
+
+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, ioexpander_init, NULL);