[coreboot-gerrit] New patch to review for coreboot: google/veyron*: change .ddrconfig from 14 to 3
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Wed Nov 2 10:55:33 CET 2016
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17210
-gerrit
commit 0e0988b971e46234198bd6e3945d20e6532ffddf
Author: ZhengShunQian <zhengsq at rock-chips.com>
Date: Fri Oct 28 16:16:04 2016 +0800
google/veyron*: change .ddrconfig from 14 to 3
There are two configs, sdram-lpddr3-hynix-2GB.inc and
sdram-lpddr3-samsung-2GB-24EB.inc that use .ddrconfig = 14.
Changing .ddrconfig from 14 to 3 improves performance
especially on contiguous memory accesses. Comparing the .ddrconfig:
- if .ddrconfig = 3,
C RDRR RRRR RRRR RRRR RBBB CCCC CCCC C---
- if .ddrconfig = 14,
C DRBB BRRR RRRR RRRR RRRR CCCC CCCC C---
where
- R: indicates Row bits
- B: indicates Bank bits
- C: indicates Column bits
- D: indicates Chip selects bits
.ddrconfig = 3 has multiple banks switching which improves DDR timing.
BUG=chrome-os-partner:57321
TEST=Boot from fievel and play video
BRANCH=veyron
Change-Id: Ifdcedc28e84429b8b79c7553b38b667631d29c09
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 93882e4f2000d93c9dae5e6d4b2e1f4b7bc9489e
Original-Change-Id: Ic98ebae48609a7604ec678b6bd14dd2b29b669c4
Original-Signed-off-by: ZhengShunQian <zhengsq at rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/404691
Original-Commit-Ready: Shunqian Zheng <zhengsq at rock-chips.com>
Original-Tested-by: Shunqian Zheng <zhengsq at rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 2 +-
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc | 2 +-
src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 2 +-
.../google/veyron_brain/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc | 2 +-
src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 2 +-
.../google/veyron_danger/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc | 2 +-
src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 2 +-
.../google/veyron_emile/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc | 2 +-
src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 2 +-
.../google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc | 2 +-
src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 2 +-
.../google/veyron_romy/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc | 2 +-
12 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB.inc
index 00dc549..1c35c90 100644
--- a/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
index a4bfb01..c4ce972 100644
--- a/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
+++ b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-hynix-2GB.inc
index 00dc549..1c35c90 100644
--- a/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ b/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-hynix-2GB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc b/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
index a4bfb01..c4ce972 100644
--- a/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
+++ b/src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-hynix-2GB.inc
index 00dc549..1c35c90 100644
--- a/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ b/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-hynix-2GB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc b/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
index a4bfb01..c4ce972 100644
--- a/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
+++ b/src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-hynix-2GB.inc
index 00dc549..1c35c90 100644
--- a/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ b/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-hynix-2GB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc b/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
index a4bfb01..c4ce972 100644
--- a/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
+++ b/src/mainboard/google/veyron_emile/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc
index 8573652..8ad3338 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc
@@ -70,7 +70,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
index a4bfb01..c4ce972 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-hynix-2GB.inc
index 00dc549..1c35c90 100644
--- a/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ b/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-hynix-2GB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc b/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
index a4bfb01..c4ce972 100644
--- a/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
+++ b/src/mainboard/google/veyron_romy/sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc
@@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
- .ddrconfig = 14,
+ .ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
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