[coreboot-gerrit] New patch to review for coreboot: [DO NOT MERGE] Some workarounds for RISC-V incompatibilities
Jonathan Neuschäfer (j.neuschaefer@gmx.net)
gerrit at coreboot.org
Fri May 27 09:26:18 CEST 2016
Jonathan Neuschäfer (j.neuschaefer at gmx.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14986
-gerrit
commit 6e536db013b7eb172676429d9f06de4399b36e48
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date: Fri May 27 09:05:03 2016 +0200
[DO NOT MERGE] Some workarounds for RISC-V incompatibilities
Our current GCC port uses newer CSR numbers that don't work with Spike
3bfc00ef anymore, but newer Spike versions introduce some weirdness that
I have to understand before switching to them.
I'm submitting this patch to Gerrit so that others can use it locally if
they want to run coreboot in Spike.
Change-Id: I7fe5358738cef08a8ce0a789928b24fdfd2e481c
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
src/arch/riscv/bootblock.S | 4 ++--
src/drivers/uart/htif.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S
index 029e9e4..7185e29 100644
--- a/src/arch/riscv/bootblock.S
+++ b/src/arch/riscv/bootblock.S
@@ -39,7 +39,7 @@ _start:
# make room for HLS and initialize it
addi sp, sp, -64 // MENTRY_FRAME_SIZE
- csrr a0, mhartid
+ csrr a0, CSR_MHARTID
call hls_init
//poison the stack
@@ -48,7 +48,7 @@ _start:
sd t0, 0(t1)
la t0, exception_handler
- csrw stvec, t0
+ csrw CSR_STVEC, t0
# clear any pending interrupts
csrwi sip, 0
diff --git a/src/drivers/uart/htif.c b/src/drivers/uart/htif.c
index 7533981..8bd9f8f 100644
--- a/src/drivers/uart/htif.c
+++ b/src/drivers/uart/htif.c
@@ -42,11 +42,11 @@ void uart_tx_byte(int idx, unsigned char data)
return;
/* Device 1: console; command 1: write */
- write_csr(mtohost, TOHOST_CMD(1, 1, data));
+ write_csr(0x780, TOHOST_CMD(1, 1, data));
/* Read from mfromhost to avoid some kind of race condition when
* characters are printed to fast */
- read_csr(mfromhost);
+ read_csr(0x781);
}
unsigned char uart_rx_byte(int idx)
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