[coreboot-gerrit] New patch to review for coreboot: DO NOT MERGE: soc/intel/quark: Set subsystem IDs

Leroy P Leahy (leroy.p.leahy@intel.com) gerrit at coreboot.org
Tue May 17 18:33:30 CEST 2016


Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14872

-gerrit

commit 65695fefc534bd293e07374d3ffb5aaa47254001
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Sun Feb 14 16:02:29 2016 -0800

    DO NOT MERGE: soc/intel/quark: Set subsystem IDs
    
    TEST=????
    
    Change-Id: I12bd639f2d8dfdedd8f99b848a5b1b49781c7f37
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/soc/intel/quark/chip.c                 | 18 ++++++++++++++++++
 src/soc/intel/quark/include/soc/ramstage.h |  1 +
 src/soc/intel/quark/northcluster.c         |  1 +
 3 files changed, 20 insertions(+)

diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c
index 30ab48a..090d6a0 100644
--- a/src/soc/intel/quark/chip.c
+++ b/src/soc/intel/quark/chip.c
@@ -150,6 +150,24 @@ struct chip_operations soc_intel_quark_ops = {
 	.enable_dev	= chip_enable_dev,
 };
 
+static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+{
+	if (!vendor || !device) {
+		vendor = pci_read_config32(dev, PCI_VENDOR_ID);
+		device = vendor >> 16;
+	}
+	printk(BIOS_SPEW,
+		"PCI: %02x:%02x:%d subsystem vendor: 0x%04x, device: 0x%04x\n",
+		0, PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn),
+		vendor & 0xffff, device);
+	pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
+			((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+
+struct pci_operations chip_pci_ops = {
+	.set_subsystem = &pci_set_subsystem,
+};
+
 void soc_silicon_init_params(SILICON_INIT_UPD *upd)
 {
 }
diff --git a/src/soc/intel/quark/include/soc/ramstage.h b/src/soc/intel/quark/include/soc/ramstage.h
index 80e2f00..abfb827 100644
--- a/src/soc/intel/quark/include/soc/ramstage.h
+++ b/src/soc/intel/quark/include/soc/ramstage.h
@@ -23,5 +23,6 @@
 #include <soc/QuarkNcSocId.h>
 
 void mainboard_gpio_i2c_init(device_t dev);
+extern struct pci_operations chip_pci_ops;
 
 #endif /* _SOC_RAMSTAGE_H_ */
diff --git a/src/soc/intel/quark/northcluster.c b/src/soc/intel/quark/northcluster.c
index b52c3b7..6088694 100644
--- a/src/soc/intel/quark/northcluster.c
+++ b/src/soc/intel/quark/northcluster.c
@@ -75,6 +75,7 @@ static struct device_operations nc_ops = {
 	.read_resources   = &nc_read_resources,
 	.set_resources    = &pci_dev_set_resources,
 	.enable_resources = &pci_dev_enable_resources,
+	.ops_pci          = &chip_pci_ops,
 };
 
 static const struct pci_driver systemagent_driver __pci_driver = {



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