[coreboot-gerrit] New patch to review for coreboot: rockchip: gru: enable eDP display

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14858

-gerrit

commit 9ddacaff0706df1303f00933be5c82e7105ee103
Author: Lin Huang <hl at rock-chips.com>
Date:   Thu Mar 31 18:44:13 2016 +0800

    rockchip: gru: enable eDP display
    
    This patch enable eDP display by,
    o. set HPD pinmux, backligh, vdd for eDP
    o. set vop mode
    o. enable VGA configs for edid
    
    BRANCH=none
    BUG=chrome-os-partner:51537
    TEST=the dev screen shown on kevin board
    
    Change-Id: If8b07307454daa88727d317cc208d6c97de07ad7
    Signed-off-by: Martin Roth <martinroth at google.com>
    Original-Commit-Id:
    Original-Change-Id: Id7006619b5be638b286a5402d892a5361ac1e430
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/340026
    Original-Reviewed-by: Shunqian Zheng <zhengsq at rock-chips.com>
---
 src/mainboard/google/gru/Kconfig          |  2 ++
 src/mainboard/google/gru/devicetree.cb    |  3 ++
 src/mainboard/google/gru/mainboard.c      | 58 +++++++++++++++++++++++++++++++
 src/soc/rockchip/rk3399/include/soc/grf.h |  2 ++
 4 files changed, 65 insertions(+)

diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig
index b0ea9ff..48ae698 100644
--- a/src/mainboard/google/gru/Kconfig
+++ b/src/mainboard/google/gru/Kconfig
@@ -24,7 +24,9 @@ config BOARD_SPECIFIC_OPTIONS
 	select BOARD_ROMSIZE_KB_8192
 	select COMMON_CBFS_SPI_WRAPPER
 	select HAVE_HARD_RESET
+	select MAINBOARD_DO_NATIVE_VGA_INIT
 	select MAINBOARD_HAS_CHROMEOS
+	select MAINBOARD_HAS_NATIVE_VGA_INIT
 	select SOC_ROCKCHIP_RK3399
 	select SPI_FLASH
 	select SPI_FLASH_GIGADEVICE
diff --git a/src/mainboard/google/gru/devicetree.cb b/src/mainboard/google/gru/devicetree.cb
index b349888..be1d466 100644
--- a/src/mainboard/google/gru/devicetree.cb
+++ b/src/mainboard/google/gru/devicetree.cb
@@ -15,4 +15,7 @@
 
 chip soc/rockchip/rk3399
 	device cpu_cluster 0 on end
+	register "vop_id" = "0"
+	register "vop_mode" = "VOP_MODE_EDP"
+	register "framebuffer_bits_per_pixel" = "16"
 end
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index 6824cbf..0ccedd3 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -15,11 +15,15 @@
  */
 
 #include <boardid.h>
+#include <delay.h>
 #include <device/device.h>
+#include <device/i2c.h>
 #include <gpio.h>
 #include <soc/clock.h>
+#include <soc/display.h>
 #include <soc/emmc.h>
 #include <soc/grf.h>
+#include <soc/i2c.h>
 
 static void configure_emmc(void)
 {
@@ -86,10 +90,64 @@ static void configure_sdmmc(void)
 	write32(&rk3399_grf->iomux_sdmmc, IOMUX_SDMMC);
 }
 
+static void configure_display(void)
+{
+	/* set pinmux for edp HPD*/
+	gpio_input_pulldown(GPIO(4, C, 7));
+	write32(&rk3399_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG);
+
+	gpio_output(GPIO(4, D, 3), 1); /* CPU3_EDP_VDDEN for P3.3V_DISP */
+}
+
 static void mainboard_init(device_t dev)
 {
 	configure_sdmmc();
 	configure_emmc();
+	configure_display();
+}
+
+static void enable_backlight_booster(void)
+{
+	const struct {
+		uint8_t reg;
+		uint8_t value;
+	} i2c_writes[] = {
+		{1, 0x84},
+		{1, 0x85},
+		{0, 0x26}
+	};
+	int i;
+	const int booster_i2c_port = 0;
+	uint8_t i2c_buf[2];
+	struct i2c_seg i2c_command = { .read = 0, .chip = 0x2c,
+				       .buf = i2c_buf, .len = sizeof(i2c_buf)
+	};
+
+	/*
+	 * This function is called on Gru right after BL_EN is asserted. It
+	 * takes time for the switcher chip to come online, let's wait a bit
+	 * to let the voltage settle, so that the chip can be accessed.
+	 */
+	udelay(1000);
+
+	/* Select pinmux for i2c0, which is the display backlight booster. */
+	write32(&rk3399_pmugrf->iomux_i2c0_sda, IOMUX_I2C0_SDA);
+	write32(&rk3399_pmugrf->iomux_i2c0_scl, IOMUX_I2C0_SCL);
+	i2c_init(0, 100*KHz);
+
+	for (i = 0; i < ARRAY_SIZE(i2c_writes); i++) {
+		i2c_buf[0] = i2c_writes[i].reg;
+		i2c_buf[1] = i2c_writes[i].value;
+		i2c_transfer(booster_i2c_port, &i2c_command, 1);
+	}
+}
+
+void mainboard_power_on_backlight(void)
+{
+	gpio_output(GPIO(1, C, 1), 1);  /* BL_EN */
+
+	if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU))
+		enable_backlight_booster();
 }
 
 static void mainboard_enable(device_t dev)
diff --git a/src/soc/rockchip/rk3399/include/soc/grf.h b/src/soc/rockchip/rk3399/include/soc/grf.h
index df1fb03..241c97f 100644
--- a/src/soc/rockchip/rk3399/include/soc/grf.h
+++ b/src/soc/rockchip/rk3399/include/soc/grf.h
@@ -140,6 +140,7 @@ struct rk3399_grf_regs {
 		u32 iomux_pwm_1;
 		u32 iomux_uart2b;
 		u32 iomux_uart2c;
+		u32 iomux_edp_hotplug;
 		u32 gpio4c_iomux;
 	};
 	u32 gpio4d_iomux;
@@ -346,4 +347,5 @@ static struct rk3399_pmusgrf_regs * const rk3399_pmusgrf = (void *)PMUSGRF_BASE;
 #define IOMUX_PWM_3_A	RK_SETBITS(1 << 12)
 #define IOMUX_PWM_3_B	RK_SETBITS(1 << 12)
 #define IOMUX_TSADC_INT	RK_CLRSETBITS(3 << 12, 1 << 12)
+#define IOMUX_EDP_HOTPLUG	RK_CLRSETBITS(3 << 14, 2 << 14)
 #endif	/* __SOC_ROCKCHIP_RK3399_GRF_H__ */