[coreboot-gerrit] Patch merged into coreboot/master: drivers/uart: Use uart_platform_refclk for all UART models

gerrit at coreboot.org gerrit at coreboot.org
Mon May 9 18:45:56 CEST 2016


the following patch was just integrated into master:
commit 6ec72c9b4f4a903d9a451bc17629e679399aa9ee
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Sat May 7 09:04:46 2016 -0700

    drivers/uart: Use uart_platform_refclk for all UART models
    
    Allow the platform to override the input clock for the UART by
    implementing the routine uart_platform_refclk and setting the Kconfig
    value UART_OVERRIDE_REFCLK.  Provide a default uart_platform_refclk
    routine which is disabled when UART_OVERRIDE_REFCLK is selected.  This
    works around ROMCC not supporting weak routines.
    
    Testing on Galileo:
    *  Edit the src/mainboard/intel/galileo/Makefile.inc file:
       *  Add "select ADD_FSP_PDAT_FILE"
       *  Add "select ADD_FSP_RAW_BIN"
       *  Add "select ADD_RMU_FILE"
    *  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
    *  Place the pdat.bin files in the location specified by
       CONFIG_FSP_PDAT_FILE
    *  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
    *  Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
       UEFIPAYLOAD.fd
    *  Testing is successful when CorebootPayloadPkg is able to properly
       initialize the serial port without using built-in values.
    
    Change-Id: If4afc45a828e5ba935fecb6d95b239625e912d14
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
    Reviewed-on: https://review.coreboot.org/14612
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/14612 for details.

-gerrit



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