[coreboot-gerrit] Patch merged into coreboot/master: rockchip/spi: Allow SPI buses > 2

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 50afb0631f768c338e588b237e5eccf05879211f
Author: Patrick Georgi <patrick at georgi-clan.de>
Date:   Thu Apr 28 08:02:14 2016 +0200

    rockchip/spi: Allow SPI buses > 2
    
    If SPI_BASEx is defined (for 2 < x <= 5), allow selecting it.
    Since the bus number translates into an offset into an array, require
    that all earlier buses are defined, too.
    
    Also assert() that the array is properly sized instead of blindly
    exceeding its bounds when called with a too big bus number.
    
    TEST=initializing bus 5 doesn't trap anymore on kevin
    BRANCH=none
    BUG=none
    
    Change-Id: I69f8ebe10854976608197a13d223ee8a555a9545
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: c4af2a4ad4d6eea551653ca300ea6d04f1280919
    Original-Change-Id: I27724d64d822ed0ec824a69ed611140bfbe08f5a
    Original-Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
    Original-Reviewed-on: https://chromium-review.googlesource.com/341034
    Original-Commit-Ready: Vadim Bendebury <vbendeb at chromium.org>
    Original-Tested-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
    Reviewed-on: https://review.coreboot.org/14723
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See https://review.coreboot.org/14723 for details.

-gerrit