[coreboot-gerrit] New patch to review for coreboot: google/oak: Add Samsung K4E6E304EB 4G LPDDR3 SDRAM for elm-rev1 SKU2
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Sat May 7 07:41:36 CEST 2016
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14695
-gerrit
commit d6e685843557c22335ca2ad133974fc3dfdc49ed
Author: PH Hsu <ph.hsu at mediatek.com>
Date: Tue Apr 12 14:50:11 2016 +0800
google/oak: Add Samsung K4E6E304EB 4G LPDDR3 SDRAM for elm-rev1 SKU2
BUG=none
BRANCH=none
TEST=emerge-elm coreboot
Change-Id: Ib40076f2bb1516fe222e52e18592c15073c9d288
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 84d188543a9e949f7bf792ba704263a0bf97aa51
Original-Change-Id: I43ea6f07f5e337ca3bc5c5c4b3d56c89e5e0ca98
Original-Signed-off-by: PH Hsu <ph.hsu at mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/338212
Original-Commit-Ready: Yidi Lin <yidi.lin at mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin at mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
src/mainboard/google/oak/sdram_configs.c | 32 +++---
.../oak/sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc | 116 +++++++++++++++++++++
.../oak/sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc | 116 +++++++++++++++++++++
.../oak/sdram_inf/sdram-lpddr3-samsung-4GB.inc | 116 ---------------------
4 files changed, 248 insertions(+), 132 deletions(-)
diff --git a/src/mainboard/google/oak/sdram_configs.c b/src/mainboard/google/oak/sdram_configs.c
index 57c71ae..b2d8a44 100644
--- a/src/mainboard/google/oak/sdram_configs.c
+++ b/src/mainboard/google/oak/sdram_configs.c
@@ -19,22 +19,22 @@
#include <stdlib.h>
static const struct mt8173_sdram_params sdram_configs[] = {
-#include "sdram_inf/sdram-lpddr3-hynix-2GB.inc" /* ram_code = 0000 */
-#include "sdram_inf/sdram-lpddr3-samsung-2GB.inc" /* ram_code = 0001 */
-#include "sdram_inf/sdram-lpddr3-samsung-4GB.inc" /* ram_code = 0010 */
-#include "sdram_inf/sdram-lpddr3-hynix-4GB.inc" /* ram_code = 0011 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 0100 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 0101 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 0110 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 0111 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1000 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1001 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1010 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1011 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */
-#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */
+#include "sdram_inf/sdram-lpddr3-hynix-2GB.inc" /* ram_code = 0000 */
+#include "sdram_inf/sdram-lpddr3-samsung-2GB.inc" /* ram_code = 0001 */
+#include "sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc" /* ram_code = 0010 */
+#include "sdram_inf/sdram-lpddr3-hynix-4GB.inc" /* ram_code = 0011 */
+#include "sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc" /* ram_code = 0100 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 0101 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 0110 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 0111 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1000 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1001 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1010 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1011 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */
+#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */
};
const struct mt8173_sdram_params *get_sdram_config(void)
diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc
new file mode 100644
index 0000000..3dd795d
--- /dev/null
+++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc
@@ -0,0 +1,116 @@
+{ /* 4GB (16Gb + 16Gb) for dual rank dram setting */
+ {
+ .impedance_drvp = 0x9,
+ .impedance_drvn = 0xa,
+ .datlat_ucfirst = 19,
+
+ .ca_train = {
+ [CHANNEL_A] = { 8, 7, 6, 7, 4, 2, 2, 3, 4, 5},
+ [CHANNEL_B] = { 0, 0, 1, 0, 0, 5, 5, 3, 6, 5}
+ },
+
+ .ca_train_center = {
+ [CHANNEL_A] = 2,
+ [CHANNEL_B] = 0
+ },
+
+ .wr_level = {
+ [CHANNEL_A] = { 5, 6, 5, 6},
+ [CHANNEL_B] = { 6, 6, 6, 4}
+ },
+
+ .gating_win = {
+ [CHANNEL_A] = {
+ { 28, 56},
+ { 28, 56}
+ },
+ [CHANNEL_B] = {
+ { 28, 56},
+ { 28, 56}
+ }
+ },
+
+ .rx_dqs_dly = {
+ [CHANNEL_A] = 0x110e0b0b,
+ [CHANNEL_B] = 0x12100d0d
+ },
+
+ .rx_dq_dly = {
+ [CHANNEL_A] = {
+ 0x01040302,
+ 0x04010300,
+ 0x02040300,
+ 0x04030302,
+ 0x04070400,
+ 0x07070707,
+ 0x05070808,
+ 0x00010404
+ },
+ [CHANNEL_B] = {
+ 0x05060604,
+ 0x04010400,
+ 0x05070300,
+ 0x05030504,
+ 0x07090500,
+ 0x08090707,
+ 0x080a0a0a,
+ 0x02000604
+ }
+ },
+ },
+ {
+ .actim = 0xaafd478c,
+ .actim1 = 0x91001f59,
+ .actim05t = 0x000025e1,
+ .conf1 = 0x00048403,
+ .conf2 = 0x030000a9,
+ .ddr2ctl = 0x000063b1,
+ .gddr3ctl1 = 0x11000000,
+ .misctl0 = 0x21000000,
+ .pd_ctrl = 0xd1976442,
+ .rkcfg = 0x002156c1,
+ .test2_3 = 0xbfc70401,
+ .test2_4 = 0x2801110d
+ },
+ {
+ .cona = 0xa053a057,
+ .conb = 0x17283544,
+ .conc = 0x0a1a0b1a,
+ .cond = 0x00000000,
+ .cone = 0xffff0848,
+ .conf = 0x08420000,
+ .cong = 0x2b2b2a38,
+ .conh = 0x00000000,
+ .conm_1 = 0x40000500,
+ .conm_2 = 0x400005ff,
+ .mdct_1 = 0x80030303,
+ .mdct_2 = 0x34220c3f,
+ .test0 = 0xcccccccc,
+ .test1 = 0xcccccccc,
+ .testb = 0x00060124,
+ .testc = 0x38470000,
+ .testd = 0x00000000,
+ .arba = 0x7f077a49,
+ .arbc = 0xa0a070dd,
+ .arbd = 0x07007046,
+ .arbe = 0x40407046,
+ .arbf = 0xa0a070c6,
+ .arbg = 0xffff7047,
+ .arbi = 0x20406188,
+ .arbj = 0x9719595e,
+ .arbk = 0x64f3fc79,
+ .slct_1 = 0x00010800,
+ .slct_2 = 0xff03ff00,
+ .bmen = 0x00ff0001
+ },
+ {
+ .mrs_1 = 0x00830001,
+ .mrs_2 = 0x001c0002,
+ .mrs_3 = 0x00010003,
+ .mrs_10 = 0x00ff000a,
+ .mrs_11 = 0x0000000b,
+ .mrs_63 = 0x0000003f
+ },
+ .type = TYPE_LPDDR3,
+ .dram_freq = 896 * MHz,
+},
diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc
new file mode 100644
index 0000000..e6c3a83
--- /dev/null
+++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc
@@ -0,0 +1,116 @@
+{ /* 4GB (16Gb + 16Gb) for dual rank dram setting */
+ {
+ .impedance_drvp = 0x9,
+ .impedance_drvn = 0xa,
+ .datlat_ucfirst = 18,
+
+ .ca_train = {
+ [CHANNEL_A] = { 6, 4, 3, 5, 4, 0, 0, 0, 0, 0},
+ [CHANNEL_B] = { 1, 1, 1, 1, 0, 6, 5, 5, 5, 7}
+ },
+
+ .ca_train_center = {
+ [CHANNEL_A] = 3,
+ [CHANNEL_B] = 3
+ },
+
+ .wr_level = {
+ [CHANNEL_A] = { 8, 10, 6, 8},
+ [CHANNEL_B] = { 9, 9, 7, 6}
+ },
+
+ .gating_win = {
+ [CHANNEL_A] = {
+ { 27, 64},
+ { 27, 72}
+ },
+ [CHANNEL_B] = {
+ { 27, 72},
+ { 27, 72}
+ }
+ },
+
+ .rx_dqs_dly = {
+ [CHANNEL_A] = 0x08080908,
+ [CHANNEL_B] = 0x0b0b060b
+ },
+
+ .rx_dq_dly = {
+ [CHANNEL_A] = {
+ 0x01010300,
+ 0x06030002,
+ 0x01010201,
+ 0x03020002,
+ 0x00010103,
+ 0x02010201,
+ 0x02040200,
+ 0x02020201
+ },
+ [CHANNEL_B] = {
+ 0x00020202,
+ 0x02020202,
+ 0x01020201,
+ 0x01010100,
+ 0x01010101,
+ 0x01000002,
+ 0x02000201,
+ 0x00010101,
+ }
+ },
+ },
+ {
+ .actim = 0xaafd478c,
+ .actim1 = 0x91001f59,
+ .actim05t = 0x000025e1,
+ .conf1 = 0x00048403,
+ .conf2 = 0x030000a9,
+ .ddr2ctl = 0x000063b1,
+ .gddr3ctl1 = 0x11000000,
+ .misctl0 = 0x21000000,
+ .pd_ctrl = 0xd1976442,
+ .rkcfg = 0x002156c1,
+ .test2_3 = 0xbfc70401,
+ .test2_4 = 0x2801110d
+ },
+ {
+ .cona = 0x50a350a7,
+ .conb = 0x17283544,
+ .conc = 0x0a1a0b1a,
+ .cond = 0x00000000,
+ .cone = 0xffff0848,
+ .conf = 0x08420000,
+ .cong = 0x2b2b2a38,
+ .conh = 0x00000000,
+ .conm_1 = 0x40000500,
+ .conm_2 = 0x400005ff,
+ .mdct_1 = 0x80030303,
+ .mdct_2 = 0x34220c3f,
+ .test0 = 0xcccccccc,
+ .test1 = 0xcccccccc,
+ .testb = 0x00060124,
+ .testc = 0x38470000,
+ .testd = 0x00000000,
+ .arba = 0x7f077a49,
+ .arbc = 0xa0a070dd,
+ .arbd = 0x07007046,
+ .arbe = 0x40407046,
+ .arbf = 0xa0a070c6,
+ .arbg = 0xffff7047,
+ .arbi = 0x20406188,
+ .arbj = 0x9719595e,
+ .arbk = 0x64f3fc79,
+ .slct_1 = 0x00010800,
+ .slct_2 = 0xff03ff00,
+ .bmen = 0x00ff0001
+ },
+ {
+ .mrs_1 = 0x00830001,
+ .mrs_2 = 0x001c0002,
+ .mrs_3 = 0x00010003,
+ .mrs_10 = 0x00ff000a,
+ .mrs_11 = 0x0000000b,
+ .mrs_63 = 0x0000003f
+ },
+ .type = TYPE_LPDDR3,
+ .dram_freq = 896 * MHz,
+},
diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-samsung-4GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-samsung-4GB.inc
deleted file mode 100644
index e6c3a83..0000000
--- a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-samsung-4GB.inc
+++ /dev/null
@@ -1,116 +0,0 @@
-{ /* 4GB (16Gb + 16Gb) for dual rank dram setting */
- {
- .impedance_drvp = 0x9,
- .impedance_drvn = 0xa,
- .datlat_ucfirst = 18,
-
- .ca_train = {
- [CHANNEL_A] = { 6, 4, 3, 5, 4, 0, 0, 0, 0, 0},
- [CHANNEL_B] = { 1, 1, 1, 1, 0, 6, 5, 5, 5, 7}
- },
-
- .ca_train_center = {
- [CHANNEL_A] = 3,
- [CHANNEL_B] = 3
- },
-
- .wr_level = {
- [CHANNEL_A] = { 8, 10, 6, 8},
- [CHANNEL_B] = { 9, 9, 7, 6}
- },
-
- .gating_win = {
- [CHANNEL_A] = {
- { 27, 64},
- { 27, 72}
- },
- [CHANNEL_B] = {
- { 27, 72},
- { 27, 72}
- }
- },
-
- .rx_dqs_dly = {
- [CHANNEL_A] = 0x08080908,
- [CHANNEL_B] = 0x0b0b060b
- },
-
- .rx_dq_dly = {
- [CHANNEL_A] = {
- 0x01010300,
- 0x06030002,
- 0x01010201,
- 0x03020002,
- 0x00010103,
- 0x02010201,
- 0x02040200,
- 0x02020201
- },
- [CHANNEL_B] = {
- 0x00020202,
- 0x02020202,
- 0x01020201,
- 0x01010100,
- 0x01010101,
- 0x01000002,
- 0x02000201,
- 0x00010101,
- }
- },
- },
- {
- .actim = 0xaafd478c,
- .actim1 = 0x91001f59,
- .actim05t = 0x000025e1,
- .conf1 = 0x00048403,
- .conf2 = 0x030000a9,
- .ddr2ctl = 0x000063b1,
- .gddr3ctl1 = 0x11000000,
- .misctl0 = 0x21000000,
- .pd_ctrl = 0xd1976442,
- .rkcfg = 0x002156c1,
- .test2_3 = 0xbfc70401,
- .test2_4 = 0x2801110d
- },
- {
- .cona = 0x50a350a7,
- .conb = 0x17283544,
- .conc = 0x0a1a0b1a,
- .cond = 0x00000000,
- .cone = 0xffff0848,
- .conf = 0x08420000,
- .cong = 0x2b2b2a38,
- .conh = 0x00000000,
- .conm_1 = 0x40000500,
- .conm_2 = 0x400005ff,
- .mdct_1 = 0x80030303,
- .mdct_2 = 0x34220c3f,
- .test0 = 0xcccccccc,
- .test1 = 0xcccccccc,
- .testb = 0x00060124,
- .testc = 0x38470000,
- .testd = 0x00000000,
- .arba = 0x7f077a49,
- .arbc = 0xa0a070dd,
- .arbd = 0x07007046,
- .arbe = 0x40407046,
- .arbf = 0xa0a070c6,
- .arbg = 0xffff7047,
- .arbi = 0x20406188,
- .arbj = 0x9719595e,
- .arbk = 0x64f3fc79,
- .slct_1 = 0x00010800,
- .slct_2 = 0xff03ff00,
- .bmen = 0x00ff0001
- },
- {
- .mrs_1 = 0x00830001,
- .mrs_2 = 0x001c0002,
- .mrs_3 = 0x00010003,
- .mrs_10 = 0x00ff000a,
- .mrs_11 = 0x0000000b,
- .mrs_63 = 0x0000003f
- },
- .type = TYPE_LPDDR3,
- .dram_freq = 896 * MHz,
-},
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