[coreboot-gerrit] New patch to review for coreboot: soc/apollolake/lpc_lib: Add utility to configure LPC pads

Alexandru Gagniuc (alexandrux.gagniuc@intel.com) gerrit at coreboot.org
Tue May 3 20:29:36 CEST 2016


Alexandru Gagniuc (alexandrux.gagniuc at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14587

-gerrit

commit 06744dc77baffa2594bcaa2ddaef860ba5fedb96
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Thu Apr 28 10:38:05 2016 -0700

    soc/apollolake/lpc_lib: Add utility to configure LPC pads
    
    Change-Id: Iaf325863681ad9b8b5d7662a9d267488b8fdf008
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/soc/intel/apollolake/include/soc/lpc.h |  2 ++
 src/soc/intel/apollolake/lpc_lib.c         | 16 ++++++++++++++++
 2 files changed, 18 insertions(+)

diff --git a/src/soc/intel/apollolake/include/soc/lpc.h b/src/soc/intel/apollolake/include/soc/lpc.h
index c24f6c1..b37db06 100644
--- a/src/soc/intel/apollolake/include/soc/lpc.h
+++ b/src/soc/intel/apollolake/include/soc/lpc.h
@@ -53,6 +53,8 @@
 #define  LGMR_EN			(1 << 0)
 #define LGMR_WINDOW_SIZE		(64 * KiB)
 
+/* Configure the SOC's LPC pads and mux them to the LPC function. */
+void lpc_configure_pads(void);
 /* Enable fixed IO ranges to LPC. IOE_* macros can be OR'ed together. */
 void lpc_enable_fixed_io_ranges(uint16_t io_enables);
 /* Open a generic IO window to the LPC bus. Four windows are available. */
diff --git a/src/soc/intel/apollolake/lpc_lib.c b/src/soc/intel/apollolake/lpc_lib.c
index c3d7aae..d99b58f 100644
--- a/src/soc/intel/apollolake/lpc_lib.c
+++ b/src/soc/intel/apollolake/lpc_lib.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <device/pci.h>
 #include <lib.h>
+#include <soc/gpio.h>
 #include <soc/lpc.h>
 #include <soc/pci_devs.h>
 
@@ -40,6 +41,21 @@ static const struct lpc_mmio_range {
 	{ 0, 0 }
 };
 
+static const struct pad_config lpc_gpios[] = {
+	PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(LPC_CLKOUT0, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(LPC_CLKOUT1, UP_20K, DEEP, NF1)
+};
+
+void lpc_configure_pads(void)
+{
+	gpio_configure_pads(lpc_gpios, ARRAY_SIZE(lpc_gpios));
+}
+
 void lpc_enable_fixed_io_ranges(uint16_t io_enables)
 {
 	uint16_t reg_io_enables;



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