[coreboot-gerrit] Patch set updated for coreboot: src/lib: Capitalize ROM, RAM, NVRAM and CPU

[HAOUAS Elyes (ehaouas@noos.fr)]

HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15985

-gerrit

commit 7dc14d6d51c8ab984b550e8072ed4e8289875354
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Sat Jul 30 15:51:13 2016 +0200

    src/lib: Capitalize ROM, RAM, NVRAM and CPU
    
    Change-Id: Id0871b0c2eb31e2d728180b44cc5b518b751add4
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
 src/lib/cbmem_console.c | 2 +-
 src/lib/selfboot.c      | 2 +-
 src/lib/thread.c        | 2 +-
 src/lib/tpm2_tlcl.c     | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c
index f399f64..49c11eb 100644
--- a/src/lib/cbmem_console.c
+++ b/src/lib/cbmem_console.c
@@ -41,7 +41,7 @@ static void copy_console_buffer(struct cbmem_console *old_cons_p,
 #ifdef __PRE_RAM__
 /*
  * While running from ROM, before DRAM is initialized, some area in cache as
- * ram space is used for the console buffer storage. The size and location of
+ * RAM space is used for the console buffer storage. The size and location of
  * the area are defined by the linker script with _(e)preram_cbmem_console.
  */
 
diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c
index 8e84a68..2fdf8ce 100644
--- a/src/lib/selfboot.c
+++ b/src/lib/selfboot.c
@@ -248,7 +248,7 @@ static int build_self_segment_list(
 
 	for (current_segment = first_segment;; ++current_segment) {
 		printk(BIOS_DEBUG,
-			"Loading segment from rom address 0x%p\n",
+			"Loading segment from ROM address 0x%p\n",
 			current_segment);
 
 		cbfs_decode_payload_segment(&segment, current_segment);
diff --git a/src/lib/thread.c b/src/lib/thread.c
index 3ddf82f..75d0cfc 100644
--- a/src/lib/thread.c
+++ b/src/lib/thread.c
@@ -43,7 +43,7 @@ static inline int thread_can_yield(const struct thread *t)
 	return (t != NULL && t->can_yield);
 }
 
-/* Assumes current cpu info can switch. */
+/* Assumes current CPU info can switch. */
 static inline struct thread *cpu_info_to_thread(const struct cpu_info *ci)
 {
 	return ci->thread;
diff --git a/src/lib/tpm2_tlcl.c b/src/lib/tpm2_tlcl.c
index 4ac112a..c8e7e90 100644
--- a/src/lib/tpm2_tlcl.c
+++ b/src/lib/tpm2_tlcl.c
@@ -301,7 +301,7 @@ uint32_t tlcl_define_space(uint32_t space_index, size_t space_size)
 	nvds_cmd.publicInfo.nvIndex = HR_NV_INDEX + space_index;
 	nvds_cmd.publicInfo.nameAlg = TPM_ALG_SHA256;
 
-	/* Attributes common for all NV ram spaces used by firmware. */
+	/* Attributes common for all NVRAM spaces used by firmware. */
 	nvds_cmd.publicInfo.attributes.TPMA_NV_PPWRITE = 1;
 	nvds_cmd.publicInfo.attributes.TPMA_NV_AUTHREAD = 1;
 	nvds_cmd.publicInfo.attributes.TPMA_NV_PPREAD = 1;