[coreboot-gerrit] New patch to review for coreboot: arch/x86: bootblock and postcar support for SOC MTRR access

[Lee Leahy (leroy.p.leahy@intel.com)]

Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15846

-gerrit

commit f35582308b58e7f1c1dc9d96dd243a8e0f0f72a1
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Sun Jul 24 08:09:40 2016 -0700

    arch/x86: bootblock and postcar support for SOC MTRR access
    
    Quark does not support the rdmsr and wrmsr instructions.  Use SOC
    specific routines to configure the MTRRs on Quark based platforms.
    Add cpu_common.c as a build dependency to provide access to the routine
    cpu_phys_address_size.
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I43b7067c66c5c55b42097937e862078adf17fb19
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/arch/x86/Makefile.inc     | 2 ++
 src/arch/x86/exit_car.S       | 9 +++++++++
 src/arch/x86/postcar_loader.c | 2 +-
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 82db38a..b15f25f 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -95,6 +95,7 @@ endef
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
 
 bootblock-y += boot.c
+bootblock-y += cpu_common.c
 bootblock-y += memcpy.c
 bootblock-y += memset.c
 bootblock-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -271,6 +272,7 @@ postcar-generic-ccopts += -D__POSTCAR__
 
 postcar-y += boot.c
 postcar-y += cbfs_and_run.c
+postcar-y += cpu_common.c
 postcar-y += exit_car.S
 postcar-y += memset.c
 postcar-y += memcpy.c
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S
index e04bd04..69c757d 100644
--- a/src/arch/x86/exit_car.S
+++ b/src/arch/x86/exit_car.S
@@ -54,6 +54,14 @@ _start:
 	 *   0x00: Number of variable MTRRs to clear
 	 */
 
+#if IS_ENABLED(CONFIG_SOC_SETS_MTRRS)
+	push	%esp
+	call	soc_set_mtrrs
+
+	/* eax: new top_of_stack with setup_stack_and_mtrrs data removed */
+	movl	%eax, %esp
+	call	soc_enable_mtrrs
+#else
 	/* Clear variable MTRRs. */
 	pop	%ebx	/* Number to clear */
 	test	%ebx, %ebx
@@ -98,6 +106,7 @@ _start:
 	and	$(~(MTRR_DEF_TYPE_MASK)), %eax
 	or	$(MTRR_DEF_TYPE_EN), %eax
 	wrmsr
+#endif /* CONFIG_SOC_SETS_MTRRS */
 
 	/* Load and run ramstage. */
 	call	copy_and_run
diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c
index cc1d460..267bb12 100644
--- a/src/arch/x86/postcar_loader.c
+++ b/src/arch/x86/postcar_loader.c
@@ -35,7 +35,7 @@ int postcar_frame_init(struct postcar_frame *pcf, size_t stack_size)
 	void *stack;
 	msr_t msr;
 
-	msr = rdmsr(MTRR_CAP_MSR);
+	msr = soc_mtrr_read(MTRR_CAP_MSR);
 
 	stack = cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, stack_size);
 	if (stack == NULL) {