[coreboot-gerrit] New patch to review for coreboot: intel/haswell: Add asmlinkage for romstage_after_car()

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15789

-gerrit

commit 304fd19d9992c7ff906516eaeeba051ff256a7a4
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Jul 21 21:08:28 2016 +0300

    intel/haswell: Add asmlinkage for romstage_after_car()
    
    Change-Id: Ib3c973d2e89d4c25c3bf1e52662fbfcb4b1e4355
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/intel/haswell/haswell.h  | 2 +-
 src/cpu/intel/haswell/romstage.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index 8298fb1..41cd5ba 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -183,7 +183,7 @@ void romstage_common(const struct romstage_params *params);
 void * asmlinkage romstage_main(unsigned long bist);
 /* romstage_after_car() is the C function called after cache-as-ram has
  * been torn down. It is responsible for loading the ramstage. */
-void romstage_after_car(void);
+void asmlinkage romstage_after_car(void);
 #endif
 
 #ifdef __SMM__
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 9154316..8b15ed5 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -259,7 +259,7 @@ void romstage_common(const struct romstage_params *params)
 	}
 }
 
-void romstage_after_car(void)
+void asmlinkage romstage_after_car(void)
 {
 	/* Load the ramstage. */
 	run_ramstage();