[coreboot-gerrit] New patch to review for coreboot: mainboard/kunimitsu: Define mainboard hook from bootblock

[Subrata Banik (subrata.banik@intel.com)]

Subrata Banik (subrata.banik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15786

-gerrit

commit 7b9039ab9977b6790dbd7f59f667d9ea785e600a
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Thu Jul 21 23:47:38 2016 +0530

    mainboard/kunimitsu: Define mainboard hook from bootblock
    
    Moving mainboard early init functionality from car.c to bootblock
    
    As part of bootblock_mainboard_early_init pre console init
    - Configure UART2 GPIO for as in bootblock_mainboard_early_init()
    
    BUG=chrome-os-partner:55357
    BRANCH=none
    TEST=Build and boot SKL till POST code 0x34 with console enable
    
    Change-Id: I1b912985a0234d103dcf025b1a88094e639d197d
    Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
    Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
 src/mainboard/intel/kunimitsu/Makefile.inc         |  5 ++--
 .../intel/kunimitsu/bootblock_mainboard.c          | 31 ++++++++++++++++++++++
 src/mainboard/intel/kunimitsu/gpio.h               |  6 +++++
 3 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/intel/kunimitsu/Makefile.inc b/src/mainboard/intel/kunimitsu/Makefile.inc
index 4bf6e0a..1561b24 100644
--- a/src/mainboard/intel/kunimitsu/Makefile.inc
+++ b/src/mainboard/intel/kunimitsu/Makefile.inc
@@ -16,8 +16,9 @@
 
 subdirs-y += spd
 
+bootblock-y += bootblock_mainboard.c
+
 romstage-y += boardid.c
-romstage-y += car.c
 romstage-y += pei_data.c
 
 verstage-$(CONFIG_CHROMEOS) += chromeos.c
@@ -32,5 +33,3 @@ ramstage-y += pei_data.c
 ramstage-y += ramstage.c
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
-
-verstage-y += car.c
diff --git a/src/mainboard/intel/kunimitsu/bootblock_mainboard.c b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c
new file mode 100644
index 0000000..d76d42e
--- /dev/null
+++ b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <soc/gpio.h>
+#include "gpio.h"
+
+void bootblock_mainboard_early_init(void)
+{
+	gpio_configure_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
+}
+
+void bootblock_mainboard_init(void)
+{
+	/* This is a hack for FSP because it does things in MemoryInit()
+	 * which it shouldn't be. We have to prepare certain gpios here
+	 * because of the brokenness in FSP. */
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
\ No newline at end of file
diff --git a/src/mainboard/intel/kunimitsu/gpio.h b/src/mainboard/intel/kunimitsu/gpio.h
index 473d9a0..8219c89 100644
--- a/src/mainboard/intel/kunimitsu/gpio.h
+++ b/src/mainboard/intel/kunimitsu/gpio.h
@@ -238,6 +238,12 @@ static const struct pad_config early_gpio_table[] = {
 /* UART0_CTS# */	PAD_CFG_GPO(GPP_C11, 0, DEEP), /* EN_PP3300_KEPLER */
 };
 
+/* UART2 pad configuration. Support RXD and TXD for now. */
+static const struct pad_config uart2_pads[] = {
+/* UART2_RXD */		PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
+/* UART2_TXD */		PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
+};
+
 #endif
 
 #endif