[coreboot-gerrit] New patch to review for coreboot: google/veyron_mickey: Update Hynix memory configuration

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13048

-gerrit

commit fdf5f9b31d0d2fa321da3d5d7c471bd6e3d52fc5
Author: Lang Zhang <kingsley_zhang at asus.com>
Date:   Wed Jan 6 16:47:04 2016 +0800

    google/veyron_mickey: Update Hynix memory configuration
    
    Update Hynix memory configuration for mickey
    so that it can boot on Hynix board.
    
    BUG=chrome-os-partner:48637
    BRANCH=master
    TEST=Boot on mickey hynix board
    
    Change-Id: Ibbf90cf76793005e23a720b97540b268ebf0864d
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 071167b667685c26106641e6899984c7bd91e84b
    Original-Change-Id: Id63d74cac36b9fd84bdb88969291982e14fa7d01
    Original-Signed-off-by: Lang Zhang <kingsley_zhang at asus.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/320623
    Original-Commit-Ready: lang zhang <kingsley_zhang at asus.com>
    Original-Tested-by: lang zhang <kingsley_zhang at asus.com>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
 src/mainboard/google/veyron_mickey/sdram_configs.c |  2 +-
 .../sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc    | 79 ++++++++++++++++++++++
 2 files changed, 80 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/veyron_mickey/sdram_configs.c b/src/mainboard/google/veyron_mickey/sdram_configs.c
index 66e839e..aaa0bf3 100644
--- a/src/mainboard/google/veyron_mickey/sdram_configs.c
+++ b/src/mainboard/google/veyron_mickey/sdram_configs.c
@@ -24,7 +24,7 @@ static struct rk3288_sdram_params sdram_configs[] = {
 #include "sdram_inf/sdram-lpddr3-samsung-2GB.inc"	/* ram_code = 0000 */
 #include "sdram_inf/sdram-lpddr3-hynix-2GB.inc"		/* ram_code = 0001 */
 #include "sdram_inf/sdram-unused.inc"			/* ram_code = 0010 */
-#include "sdram_inf/sdram-unused.inc"			/* ram_code = 0011 */
+#include "sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc"	/* ram_code = 0011 */
 #include "sdram_inf/sdram-ddr3-samsung-2GB.inc"		/* ram_code = 0100 */
 #include "sdram_inf/sdram-ddr3-hynix-2GB.inc"		/* ram_code = 0101 */
 #include "sdram_inf/sdram-ddr3-samsung-2GB.inc"		/* ram_code = 0110 */
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc
new file mode 100644
index 0000000..a90856a
--- /dev/null
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc
@@ -0,0 +1,79 @@
+{
+	/* Hynix H9CCNNNBPTBLBR-NUD chips */
+	{
+		{
+			.rank = 0x2,
+			.col = 0xA,
+			.bk = 0x3,
+			.bw = 0x2,
+			.dbw = 0x2,
+			.row_3_4 = 0x0,
+			.cs0_row = 0xE,
+			.cs1_row = 0xE
+		},
+		{
+			.rank = 0x2,
+			.col = 0xA,
+			.bk = 0x3,
+			.bw = 0x2,
+			.dbw = 0x2,
+			.row_3_4 = 0x0,
+			.cs0_row = 0xE,
+			.cs1_row = 0xE
+		}
+	},
+	{
+		.togcnt1u = 0x215,
+		.tinit = 0xC8,
+		.trsth = 0x0,
+		.togcnt100n = 0x35,
+		.trefi = 0x26,
+		.tmrd = 0x2,
+		.trfc = 0x70,
+		.trp = 0x2000D,
+		.trtw = 0x6,
+		.tal = 0x0,
+		.tcl = 0x8,
+		.tcwl = 0x4,
+		.tras = 0x17,
+		.trc = 0x24,
+		.trcd = 0xD,
+		.trrd = 0x6,
+		.trtp = 0x4,
+		.twr = 0x8,
+		.twtr = 0x4,
+		.texsr = 0x76,
+		.txp = 0x4,
+		.txpdll = 0x0,
+		.tzqcs = 0x30,
+		.tzqcsi = 0x0,
+		.tdqs = 0x1,
+		.tcksre = 0x2,
+		.tcksrx = 0x2,
+		.tcke = 0x4,
+		.tmod = 0x0,
+		.trstl = 0x0,
+		.tzqcl = 0xC0,
+		.tmrr = 0x4,
+		.tckesr = 0x8,
+		.tdpd = 0x1F4
+	},
+	{
+		.dtpr0 = 0x48D7DD93,
+		.dtpr1 = 0x187008D8,
+		.dtpr2 = 0x121076,
+		.mr[0] = 0x0,
+		.mr[1] = 0xC3,
+		.mr[2] = 0x6,
+		/* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
+		.mr[3] = 0x2
+	},
+	.noc_timing = 0x20D266A4,
+	.noc_activate = 0x5B6,
+	.ddrconfig = 2,
+	.ddr_freq = 533*MHz,
+	.dramtype = LPDDR3,
+	.num_channels = 2,
+	.stride = 9,
+	.odt = 1,
+},