[coreboot-gerrit] Patch merged into coreboot/master: google/glados: Set FSP params for min assertion widths and serirq

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit ec19fccf7614ae4405829ac0e71460ff18500ee8
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Thu Jan 7 16:55:31 2016 -0800

    google/glados: Set FSP params for min assertion widths and serirq
    
    - Enable serial irq configuration in FSP.
    - Set minimum assertion width values for FSP to configure.
    - Set I2C4 voltage to 1.8V.
    - Enable SaGv feature to dynamically train memory frequency.
    - Disable Deep S3 to match chell so DeepSx story is consistent
    on skylake-y boards.
    
    BUG=chrome-os-partner:47688
    BRANCH=none
    TEST=emerge-glados coreboot (tested on chell board)
    
    Change-Id: Ied6bda6a3f2108df7167e0970abe71977d8d2a5c
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: fbf353288edc9629ad03b17d0a582e3042d5a5e1
    Original-Change-Id: I1619dd5316060793f38b74f8f0bcaf23d8ab2552
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/321211
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/13008
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/13008 for details.

-gerrit