[coreboot-gerrit] New patch to review for coreboot: intel/kunimitsu: Add device properties for Nuvoton codec

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Fri Jan 15 16:45:59 CET 2016


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13014

-gerrit

commit 1ebd09afb2ba1c2f363b9f3868aabe5c6377bfff
Author: Yong Zhi <yong.zhi at intel.com>
Date:   Wed Jan 13 15:21:00 2016 -0800

    intel/kunimitsu: Add device properties for Nuvoton codec
    
    This patch added default values for two SAR properies
    introduced by updated nau8825 codec driver. Also updated
    sar-threshold to improve button detection accuracy.
    
    Bug=chrome-os-partner:49394
    BRANCH=glados
    TEST=Build for kunimitsu. Tested with 4-button headset
    
    Change-Id: I4096c60be54819d0ab2bf4b72a1e403f88d96af0
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 4b747e9dffed1c51131f0028879d4c22283c8ec5
    Original-Change-Id: I3e222ff58c1483e261acf1cea297164966bf8689
    Original-Signed-off-by: Yong Zhi <yong.zhi at intel.com>
    Original-Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/322241
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/intel/kunimitsu/acpi/mainboard.asl | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl
index 8006713..8692c58 100644
--- a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl
+++ b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl
@@ -208,7 +208,7 @@ Scope (\_SB.PCI0.I2C4)
 			 */
 			Package () { "nuvoton,sar-threshold-num", 4 },
 			Package () { "nuvoton,sar-threshold",
-				Package() { 0x0a, 0x14, 0x26, 0x73 } },
+				Package() { 0x08, 0x12, 0x26, 0x73 } },
 			/*
 			 * Coeff 0-15 used to adjust threshold level
 			 * 0 for low resist range
@@ -216,6 +216,8 @@ Scope (\_SB.PCI0.I2C4)
 			Package () { "nuvoton,sar-hysteresis", 0 },
 			/* SAR tracking gain based on 2.754 micbias-voltage */
 			Package () { "nuvoton,sar-voltage", 6 },
+			Package () { "nuvoton,sar-compare-time", 1 },
+			Package () { "nuvoton,sar-sampling-time", 1 },
 			/* 100ms short key press debounce */
 			Package () { "nuvoton,short-key-debounce", 3 },
 			/* 2^(7+2) = 512 ms insert/eject debounce */



More information about the coreboot-gerrit mailing list