[coreboot-gerrit] New patch to review for coreboot: intel/i945: Factor out ram init time stamps

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17994

-gerrit

commit 9b3921828af3441011de3235a431f53dbd16b5b3
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Thu Dec 29 22:46:12 2016 +0100

    intel/i945: Factor out ram init time stamps
    
    Instead of having the code for the RAM init time stamps in each mainboard’s
    `romstage.c`, factor it out to the northbridge code.
    
    Change-Id: Ibb699a1fea2f0b1f3c6564d401542d2fb3249f5a
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c | 2 --
 src/mainboard/lenovo/t60/romstage.c             | 2 --
 src/mainboard/lenovo/x60/romstage.c             | 2 --
 3 files changed, 6 deletions(-)

diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
index 62729a7..a2bbb47 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
@@ -206,9 +206,7 @@ void mainboard_romstage_entry(unsigned long bist)
 	dump_spd_registers();
 #endif
 
-	timestamp_add_now(TS_BEFORE_INITRAM);
 	sdram_initialize(s3resume ? 2 : boot_mode, NULL);
-	timestamp_add_now(TS_AFTER_INITRAM);
 
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index d3cd90c..e9ac79c 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -263,9 +263,7 @@ void mainboard_romstage_entry(unsigned long bist)
 	dump_spd_registers();
 #endif
 
-	timestamp_add_now(TS_BEFORE_INITRAM);
 	sdram_initialize(s3resume ? 2 : 0, spd_addrmap);
-	timestamp_add_now(TS_AFTER_INITRAM);
 
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
index 53a0151..c8f27a2 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/romstage.c
@@ -268,9 +268,7 @@ void mainboard_romstage_entry(unsigned long bist)
 	dump_spd_registers();
 #endif
 
-	timestamp_add_now(TS_BEFORE_INITRAM);
 	sdram_initialize(s3resume ? 2 : 0, spd_addrmap);
-	timestamp_add_now(TS_AFTER_INITRAM);
 
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();